Commit 5e7922ab authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Conor Dooley
Browse files

riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi 



Add the 'cpus' label so that we can reference it in board dts files.

Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
Reviewed-by: default avatarEmil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent e0503d47

arch/riscv/boot/dts/starfive/jh7100.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@ / { 
	#address-cells = <2>;

	#size-cells = <2>;



	cpus {

	cpus: cpus {

		#address-cells = <1>;

		#size-cells = <0>;

arch/riscv/boot/dts/starfive/jh7110.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ / { 
	#address-cells = <2>;

	#size-cells = <2>;



	cpus {

	cpus: cpus {

		#address-cells = <1>;

		#size-cells = <0>;