Loading arch/tile/Kconfig +10 −10 Original line number Diff line number Diff line # For a description of the syntax of this configuration file, # see Documentation/kbuild/config-language.txt. # see Documentation/kbuild/kconfig-language.txt. config TILE def_bool y Loading arch/tile/include/asm/bitops_32.h +1 −1 Original line number Diff line number Diff line Loading @@ -122,7 +122,7 @@ static inline int test_and_change_bit(unsigned nr, return (_atomic_xor(addr, mask) & mask) != 0; } /* See discussion at smp_mb__before_atomic_dec() in <asm/atomic.h>. */ /* See discussion at smp_mb__before_atomic_dec() in <asm/atomic_32.h>. */ #define smp_mb__before_clear_bit() smp_mb() #define smp_mb__after_clear_bit() do {} while (0) Loading arch/tile/include/asm/processor.h +0 −1 Original line number Diff line number Diff line Loading @@ -269,7 +269,6 @@ extern char chip_model[64]; /* Data on which physical memory controller corresponds to which NUMA node. */ extern int node_controller[]; /* Do we dump information to the console when a user application crashes? */ extern int show_crashinfo; Loading arch/tile/kernel/intvec_32.S +2 −2 Original line number Diff line number Diff line Loading @@ -1584,7 +1584,7 @@ ENTRY(sys_cmpxchg) * about aliasing among multiple mappings of the same physical page, * and we ignore the low 3 bits so we have one lock that covers * both a cmpxchg64() and a cmpxchg() on either its low or high word. * NOTE: this code must match __atomic_hashed_lock() in lib/atomic.c. * NOTE: this must match __atomic_hashed_lock() in lib/atomic_32.c. */ #if ATOMIC_LOCKS_FOUND_VIA_TABLE() Loading Loading @@ -1718,7 +1718,7 @@ ENTRY(sys_cmpxchg) /* * Perform the actual cmpxchg or atomic_update. * Note that __futex_mark_unlocked() in uClibc relies on * Note that the system <arch/atomic.h> header relies on * atomic_update() to always perform an "mf", so don't make * it optional or conditional without modifying that code. */ Loading arch/tile/lib/atomic_32.c +1 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,7 @@ int atomic_locks[PAGE_SIZE / sizeof(int)] __page_aligned_bss; static inline int *__atomic_hashed_lock(volatile void *v) { /* NOTE: this code must match "sys_cmpxchg" in kernel/intvec.S */ /* NOTE: this code must match "sys_cmpxchg" in kernel/intvec_32.S */ #if ATOMIC_LOCKS_FOUND_VIA_TABLE() unsigned long i = (unsigned long) v & ((PAGE_SIZE-1) & -sizeof(long long)); Loading Loading
arch/tile/Kconfig +10 −10 Original line number Diff line number Diff line # For a description of the syntax of this configuration file, # see Documentation/kbuild/config-language.txt. # see Documentation/kbuild/kconfig-language.txt. config TILE def_bool y Loading
arch/tile/include/asm/bitops_32.h +1 −1 Original line number Diff line number Diff line Loading @@ -122,7 +122,7 @@ static inline int test_and_change_bit(unsigned nr, return (_atomic_xor(addr, mask) & mask) != 0; } /* See discussion at smp_mb__before_atomic_dec() in <asm/atomic.h>. */ /* See discussion at smp_mb__before_atomic_dec() in <asm/atomic_32.h>. */ #define smp_mb__before_clear_bit() smp_mb() #define smp_mb__after_clear_bit() do {} while (0) Loading
arch/tile/include/asm/processor.h +0 −1 Original line number Diff line number Diff line Loading @@ -269,7 +269,6 @@ extern char chip_model[64]; /* Data on which physical memory controller corresponds to which NUMA node. */ extern int node_controller[]; /* Do we dump information to the console when a user application crashes? */ extern int show_crashinfo; Loading
arch/tile/kernel/intvec_32.S +2 −2 Original line number Diff line number Diff line Loading @@ -1584,7 +1584,7 @@ ENTRY(sys_cmpxchg) * about aliasing among multiple mappings of the same physical page, * and we ignore the low 3 bits so we have one lock that covers * both a cmpxchg64() and a cmpxchg() on either its low or high word. * NOTE: this code must match __atomic_hashed_lock() in lib/atomic.c. * NOTE: this must match __atomic_hashed_lock() in lib/atomic_32.c. */ #if ATOMIC_LOCKS_FOUND_VIA_TABLE() Loading Loading @@ -1718,7 +1718,7 @@ ENTRY(sys_cmpxchg) /* * Perform the actual cmpxchg or atomic_update. * Note that __futex_mark_unlocked() in uClibc relies on * Note that the system <arch/atomic.h> header relies on * atomic_update() to always perform an "mf", so don't make * it optional or conditional without modifying that code. */ Loading
arch/tile/lib/atomic_32.c +1 −1 Original line number Diff line number Diff line Loading @@ -52,7 +52,7 @@ int atomic_locks[PAGE_SIZE / sizeof(int)] __page_aligned_bss; static inline int *__atomic_hashed_lock(volatile void *v) { /* NOTE: this code must match "sys_cmpxchg" in kernel/intvec.S */ /* NOTE: this code must match "sys_cmpxchg" in kernel/intvec_32.S */ #if ATOMIC_LOCKS_FOUND_VIA_TABLE() unsigned long i = (unsigned long) v & ((PAGE_SIZE-1) & -sizeof(long long)); Loading