Commit 6209038f authored by Komal Bajaj's avatar Komal Bajaj Committed by Bjorn Andersson
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arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller 



Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on QDU1000
and QRU1000 SoCs.

Signed-off-by: default avatarKomal Bajaj <quic_kbajaj@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230313125731.17745-1-quic_kbajaj@quicinc.com
parent ec57cbce

arch/arm64/boot/dts/qcom/qdu1000.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -1321,6 +1321,18 @@ gem_noc: interconnect@19100000 { 
			qcom,bcm-voters = <&apps_bcm_voter>;

			#interconnect-cells = <2>;

		};



		system-cache-controller@19200000 {

			compatible = "qcom,qdu1000-llcc";

			reg = <0 0x19200000 0 0xd80000>,

			      <0 0x1a200000 0 0x80000>,

			      <0 0x221c8128 0 0x4>;

			reg-names = "llcc_base",

				    "llcc_broadcast_base",

				    "multi_channel_register";

			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;

			multi-ch-bit-off = <24 2>;

		};

	};



	timer {