Commit 62a770da authored by Neil Armstrong's avatar Neil Armstrong Committed by Bjorn Andersson
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arm64: dts: qcom: sm8650: add OSM L3 node 



Add the OSC L3 Cache controller node.

Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250211-topic-sm8650-ddr-bw-scaling-v2-1-a0c950540e68@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 97e05bb2

arch/arm64/boot/dts/qcom/sm8650.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -5506,6 +5506,16 @@ rpmhpd_opp_turbo_l1: opp-416 { 
			};

		};



		epss_l3: interconnect@17d90000 {

			compatible = "qcom,sm8650-epss-l3", "qcom,epss-l3";

			reg = <0 0x17d90000 0 0x1000>;



			clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;

			clock-names = "xo", "alternate";



			#interconnect-cells = <1>;

		};



		cpufreq_hw: cpufreq@17d91000 {

			compatible = "qcom,sm8650-cpufreq-epss", "qcom,cpufreq-epss";

			reg = <0 0x17d91000 0 0x1000>,