Commit 644e4d97 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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arm64: dts: qcom: sdm845: add required clocks on the gcc 



Specify input clocks to the SDM845's Global Clock Controller as required
by the bindings.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210402233944.273275-4-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 20f9d94e

arch/arm64/boot/dts/qcom/sdm845.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -1061,6 +1061,16 @@ soc: soc@0 { 
		gcc: clock-controller@100000 {

			compatible = "qcom,gcc-sdm845";

			reg = <0 0x00100000 0 0x1f0000>;

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&rpmhcc RPMH_CXO_CLK_A>,

				 <&sleep_clk>,

				 <&pcie0_lane>,

				 <&pcie1_lane>;

			clock-names = "bi_tcxo",

				      "bi_tcxo_ao",

				      "sleep_clk",

				      "pcie_0_pipe_clk",

				      "pcie_1_pipe_clk";

			#clock-cells = <1>;

			#reset-cells = <1>;

			#power-domain-cells = <1>;
@@ -2062,6 +2072,7 @@ pcie0_lane: lanes@1c06200 { 
				clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;

				clock-names = "pipe0";



				#clock-cells = <0>;

				#phy-cells = <0>;

				clock-output-names = "pcie_0_pipe_clk";

			};
@@ -2170,6 +2181,7 @@ pcie1_lane: lanes@1c06200 { 
				clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;

				clock-names = "pipe0";



				#clock-cells = <0>;

				#phy-cells = <0>;

				clock-output-names = "pcie_1_pipe_clk";

			};