Commit 653395e6 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: rzg2l: Remove unneeded nullify checks 



RZ/G2L family clock drivers never had a need to nullify clocks.
Remove the unneeded checks.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/64702c33396dde2689b44d3e326aa1727ef1557a.1740126560.git.geert+renesas@glider.be
parent 6c6ae70a

drivers/clk/renesas/rzg2l-cpg.c

+0 −10
Original line number Diff line number Diff line
@@ -1116,11 +1116,6 @@ rzg2l_cpg_register_core_clk(const struct cpg_core_clk *core, 
	WARN_DEBUG(id >= priv->num_core_clks);

	WARN_DEBUG(PTR_ERR(priv->clks[id]) != -ENOENT);



	if (!core->name) {

		/* Skip NULLified clock */

		return;

	}



	switch (core->type) {

	case CLK_TYPE_IN:

		clk = of_clk_get_by_name(priv->dev->of_node, core->name);
@@ -1355,11 +1350,6 @@ rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod, 
	WARN_DEBUG(mod->parent >= priv->num_core_clks + priv->num_mod_clks);

	WARN_DEBUG(PTR_ERR(priv->clks[id]) != -ENOENT);



	if (!mod->name) {

		/* Skip NULLified clock */

		return;

	}



	parent = priv->clks[mod->parent];

	if (IS_ERR(parent)) {

		clk = parent;