Commit 66c8f7b4 authored by Umesh Nerlige Ramappa's avatar Umesh Nerlige Ramappa Committed by Lucas De Marchi
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drm/xe: Save CTX_TIMESTAMP mmio value instead of LRC value



For determining actual job execution time, save the current value of the
CTX_TIMESTAMP register rather than the value saved in LRC since the
current register value is the closest to the start time of the job.

v2: Define MI_STORE_REGISTER_MEM to fix compile error
v3: Place MI_STORE_REGISTER_MEM sorted by MI_INSTR (Lucas)

Fixes: 65921374 ("drm/xe: Emit ctx timestamp copy in ring ops")
Signed-off-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250509161159.2173069-6-umesh.nerlige.ramappa@intel.com


(cherry picked from commit 38b14233)
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 1b36ea2f
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+4 −0
Original line number Diff line number Diff line
@@ -47,6 +47,10 @@
#define   MI_LRI_FORCE_POSTED		REG_BIT(12)
#define   MI_LRI_LEN(x)			(((x) & 0xff) + 1)

#define MI_STORE_REGISTER_MEM		(__MI_INSTR(0x24) | XE_INSTR_NUM_DW(4))
#define   MI_SRM_USE_GGTT		REG_BIT(22)
#define   MI_SRM_ADD_CS_OFFSET		REG_BIT(19)

#define MI_FLUSH_DW			__MI_INSTR(0x26)
#define   MI_FLUSH_DW_PROTECTED_MEM_EN	REG_BIT(22)
#define   MI_FLUSH_DW_STORE_INDEX	REG_BIT(21)
+1 −1
Original line number Diff line number Diff line
@@ -684,7 +684,7 @@ static inline u32 __xe_lrc_start_seqno_offset(struct xe_lrc *lrc)

static u32 __xe_lrc_ctx_job_timestamp_offset(struct xe_lrc *lrc)
{
	/* The start seqno is stored in the driver-defined portion of PPHWSP */
	/* This is stored in the driver-defined portion of PPHWSP */
	return xe_lrc_pphwsp_offset(lrc) + LRC_CTX_JOB_TIMESTAMP_OFFSET;
}

+2 −5
Original line number Diff line number Diff line
@@ -234,13 +234,10 @@ static u32 get_ppgtt_flag(struct xe_sched_job *job)

static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
{
	dw[i++] = MI_COPY_MEM_MEM | MI_COPY_MEM_MEM_SRC_GGTT |
		MI_COPY_MEM_MEM_DST_GGTT;
	dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT | MI_SRM_ADD_CS_OFFSET;
	dw[i++] = RING_CTX_TIMESTAMP(0).addr;
	dw[i++] = xe_lrc_ctx_job_timestamp_ggtt_addr(lrc);
	dw[i++] = 0;
	dw[i++] = xe_lrc_ctx_timestamp_ggtt_addr(lrc);
	dw[i++] = 0;
	dw[i++] = MI_NOOP;

	return i;
}