Commit 66d83a42 authored by Casey Connolly's avatar Casey Connolly Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm6115: add resets for sdhc_1 



These are documented and supported everywhere, but not described in DT.
Add them.

Signed-off-by: default avatarCaleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240624120849.2550621-2-caleb.connolly@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 653f0a1e

arch/arm64/boot/dts/qcom/sm6115.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -1088,6 +1088,8 @@ sdhc_1: mmc@4744000 { 
				 <&gcc GCC_SDCC1_ICE_CORE_CLK>;

			clock-names = "iface", "core", "xo", "ice";



			resets = <&gcc GCC_SDCC1_BCR>;



			power-domains = <&rpmpd SM6115_VDDCX>;

			operating-points-v2 = <&sdhc1_opp_table>;

			interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG