Commit 66ebbdfd authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-msi-2024-07-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI interrupt updates from Thomas Gleixner:
 "Switch ARM/ARM64 over to the modern per device MSI domains.

  This simplifies the handling of platform MSI and wire to MSI
  controllers and removes about 500 lines of legacy code.

  Aside of that it paves the way for ARM/ARM64 to utilize the dynamic
  allocation of PCI/MSI interrupts and to support the upcoming non
  standard IMS (Interrupt Message Store) mechanism on PCIe devices"

* tag 'irq-msi-2024-07-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
  irqchip/gic-v3-its: Correctly fish out the DID for platform MSI
  irqchip/gic-v3-its: Correctly honor the RID remapping
  genirq/msi: Move msi_device_data to core
  genirq/msi: Remove platform MSI leftovers
  irqchip/irq-mvebu-icu: Remove platform MSI leftovers
  irqchip/irq-mvebu-sei: Switch to MSI parent
  irqchip/mvebu-odmi: Switch to parent MSI
  irqchip/mvebu-gicp: Switch to MSI parent
  irqchip/irq-mvebu-icu: Prepare for real per device MSI
  irqchip/imx-mu-msi: Switch to MSI parent
  irqchip/gic-v2m: Switch to device MSI
  irqchip/gic_v3_mbi: Switch over to parent domain
  genirq/msi: Remove platform_msi_create_device_domain()
  irqchip/mbigen: Remove platform_msi_create_device_domain() fallback
  irqchip/gic-v3-its: Switch platform MSI to MSI parent
  irqchip/irq-msi-lib: Prepare for DOMAIN_BUS_WIRED_TO_MSI
  irqchip/mbigen: Prepare for real per device MSI
  irqchip/irq-msi-lib: Prepare for DEVICE MSI to replace platform MSI
  irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X]
  irqchip/irq-msi-lib: Prepare for PCI MSI/MSIX
  ...
parents ac7473a1 c9b4f313
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+3 −347
Original line number Diff line number Diff line
@@ -4,346 +4,12 @@
 *
 * Copyright (C) 2015 ARM Limited, All Rights Reserved.
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 * Copyright (C) 2022 Linutronix GmbH
 */

#include <linux/device.h>
#include <linux/idr.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/msi.h>
#include <linux/slab.h>

/* Begin of removal area. Once everything is converted over. Cleanup the includes too! */

#define DEV_ID_SHIFT	21
#define MAX_DEV_MSIS	(1 << (32 - DEV_ID_SHIFT))

/*
 * Internal data structure containing a (made up, but unique) devid
 * and the callback to write the MSI message.
 */
struct platform_msi_priv_data {
	struct device			*dev;
	void				*host_data;
	msi_alloc_info_t		arg;
	irq_write_msi_msg_t		write_msg;
	int				devid;
};

/* The devid allocator */
static DEFINE_IDA(platform_msi_devid_ida);

#ifdef GENERIC_MSI_DOMAIN_OPS
/*
 * Convert an msi_desc to a globaly unique identifier (per-device
 * devid + msi_desc position in the msi_list).
 */
static irq_hw_number_t platform_msi_calc_hwirq(struct msi_desc *desc)
{
	u32 devid = desc->dev->msi.data->platform_data->devid;

	return (devid << (32 - DEV_ID_SHIFT)) | desc->msi_index;
}

static void platform_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
{
	arg->desc = desc;
	arg->hwirq = platform_msi_calc_hwirq(desc);
}

static int platform_msi_init(struct irq_domain *domain,
			     struct msi_domain_info *info,
			     unsigned int virq, irq_hw_number_t hwirq,
			     msi_alloc_info_t *arg)
{
	return irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
					     info->chip, info->chip_data);
}

static void platform_msi_set_proxy_dev(msi_alloc_info_t *arg)
{
	arg->flags |= MSI_ALLOC_FLAGS_PROXY_DEVICE;
}
#else
#define platform_msi_set_desc		NULL
#define platform_msi_init		NULL
#define platform_msi_set_proxy_dev(x)	do {} while(0)
#endif

static void platform_msi_update_dom_ops(struct msi_domain_info *info)
{
	struct msi_domain_ops *ops = info->ops;

	BUG_ON(!ops);

	if (ops->msi_init == NULL)
		ops->msi_init = platform_msi_init;
	if (ops->set_desc == NULL)
		ops->set_desc = platform_msi_set_desc;
}

static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
{
	struct msi_desc *desc = irq_data_get_msi_desc(data);

	desc->dev->msi.data->platform_data->write_msg(desc, msg);
}

static void platform_msi_update_chip_ops(struct msi_domain_info *info)
{
	struct irq_chip *chip = info->chip;

	BUG_ON(!chip);
	if (!chip->irq_mask)
		chip->irq_mask = irq_chip_mask_parent;
	if (!chip->irq_unmask)
		chip->irq_unmask = irq_chip_unmask_parent;
	if (!chip->irq_eoi)
		chip->irq_eoi = irq_chip_eoi_parent;
	if (!chip->irq_set_affinity)
		chip->irq_set_affinity = msi_domain_set_affinity;
	if (!chip->irq_write_msi_msg)
		chip->irq_write_msi_msg = platform_msi_write_msg;
	if (WARN_ON((info->flags & MSI_FLAG_LEVEL_CAPABLE) &&
		    !(chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)))
		info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
}

/**
 * platform_msi_create_irq_domain - Create a platform MSI interrupt domain
 * @fwnode:		Optional fwnode of the interrupt controller
 * @info:	MSI domain info
 * @parent:	Parent irq domain
 *
 * Updates the domain and chip ops and creates a platform MSI
 * interrupt domain.
 *
 * Returns:
 * A domain pointer or NULL in case of failure.
 */
struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
						  struct msi_domain_info *info,
						  struct irq_domain *parent)
{
	struct irq_domain *domain;

	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
		platform_msi_update_dom_ops(info);
	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
		platform_msi_update_chip_ops(info);
	info->flags |= MSI_FLAG_DEV_SYSFS | MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS |
		       MSI_FLAG_FREE_MSI_DESCS;

	domain = msi_create_irq_domain(fwnode, info, parent);
	if (domain)
		irq_domain_update_bus_token(domain, DOMAIN_BUS_PLATFORM_MSI);

	return domain;
}
EXPORT_SYMBOL_GPL(platform_msi_create_irq_domain);

static int platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec,
					irq_write_msi_msg_t write_msi_msg)
{
	struct platform_msi_priv_data *datap;
	int err;

	/*
	 * Limit the number of interrupts to 2048 per device. Should we
	 * need to bump this up, DEV_ID_SHIFT should be adjusted
	 * accordingly (which would impact the max number of MSI
	 * capable devices).
	 */
	if (!dev->msi.domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS)
		return -EINVAL;

	if (dev->msi.domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) {
		dev_err(dev, "Incompatible msi_domain, giving up\n");
		return -EINVAL;
	}

	err = msi_setup_device_data(dev);
	if (err)
		return err;

	/* Already initialized? */
	if (dev->msi.data->platform_data)
		return -EBUSY;

	datap = kzalloc(sizeof(*datap), GFP_KERNEL);
	if (!datap)
		return -ENOMEM;

	datap->devid = ida_alloc_max(&platform_msi_devid_ida,
				     (1 << DEV_ID_SHIFT) - 1, GFP_KERNEL);
	if (datap->devid < 0) {
		err = datap->devid;
		kfree(datap);
		return err;
	}

	datap->write_msg = write_msi_msg;
	datap->dev = dev;
	dev->msi.data->platform_data = datap;
	return 0;
}

static void platform_msi_free_priv_data(struct device *dev)
{
	struct platform_msi_priv_data *data = dev->msi.data->platform_data;

	dev->msi.data->platform_data = NULL;
	ida_free(&platform_msi_devid_ida, data->devid);
	kfree(data);
}

/**
 * platform_msi_domain_alloc_irqs - Allocate MSI interrupts for @dev
 * @dev:		The device for which to allocate interrupts
 * @nvec:		The number of interrupts to allocate
 * @write_msi_msg:	Callback to write an interrupt message for @dev
 *
 * Returns:
 * Zero for success, or an error code in case of failure
 */
static int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
					  irq_write_msi_msg_t write_msi_msg)
{
	int err;

	err = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg);
	if (err)
		return err;

	err = msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, nvec - 1);
	if (err)
		platform_msi_free_priv_data(dev);

	return err;
}

/**
 * platform_msi_get_host_data - Query the private data associated with
 *                              a platform-msi domain
 * @domain:	The platform-msi domain
 *
 * Return: The private data provided when calling
 * platform_msi_create_device_domain().
 */
void *platform_msi_get_host_data(struct irq_domain *domain)
{
	struct platform_msi_priv_data *data = domain->host_data;

	return data->host_data;
}

static struct lock_class_key platform_device_msi_lock_class;

/**
 * __platform_msi_create_device_domain - Create a platform-msi device domain
 *
 * @dev:		The device generating the MSIs
 * @nvec:		The number of MSIs that need to be allocated
 * @is_tree:		flag to indicate tree hierarchy
 * @write_msi_msg:	Callback to write an interrupt message for @dev
 * @ops:		The hierarchy domain operations to use
 * @host_data:		Private data associated to this domain
 *
 * Return: An irqdomain for @nvec interrupts on success, NULL in case of error.
 *
 * This is for interrupt domains which stack on a platform-msi domain
 * created by platform_msi_create_irq_domain(). @dev->msi.domain points to
 * that platform-msi domain which is the parent for the new domain.
 */
struct irq_domain *
__platform_msi_create_device_domain(struct device *dev,
				    unsigned int nvec,
				    bool is_tree,
				    irq_write_msi_msg_t write_msi_msg,
				    const struct irq_domain_ops *ops,
				    void *host_data)
{
	struct platform_msi_priv_data *data;
	struct irq_domain *domain;
	int err;

	err = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg);
	if (err)
		return NULL;

	/*
	 * Use a separate lock class for the MSI descriptor mutex on
	 * platform MSI device domains because the descriptor mutex nests
	 * into the domain mutex. See alloc/free below.
	 */
	lockdep_set_class(&dev->msi.data->mutex, &platform_device_msi_lock_class);

	data = dev->msi.data->platform_data;
	data->host_data = host_data;
	domain = irq_domain_create_hierarchy(dev->msi.domain, 0,
					     is_tree ? 0 : nvec,
					     dev->fwnode, ops, data);
	if (!domain)
		goto free_priv;

	platform_msi_set_proxy_dev(&data->arg);
	err = msi_domain_prepare_irqs(domain->parent, dev, nvec, &data->arg);
	if (err)
		goto free_domain;

	return domain;

free_domain:
	irq_domain_remove(domain);
free_priv:
	platform_msi_free_priv_data(dev);
	return NULL;
}

/**
 * platform_msi_device_domain_free - Free interrupts associated with a platform-msi
 *				     device domain
 *
 * @domain:	The platform-msi device domain
 * @virq:	The base irq from which to perform the free operation
 * @nr_irqs:	How many interrupts to free from @virq
 */
void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
				     unsigned int nr_irqs)
{
	struct platform_msi_priv_data *data = domain->host_data;

	msi_lock_descs(data->dev);
	msi_domain_depopulate_descs(data->dev, virq, nr_irqs);
	irq_domain_free_irqs_common(domain, virq, nr_irqs);
	msi_free_msi_descs_range(data->dev, virq, virq + nr_irqs - 1);
	msi_unlock_descs(data->dev);
}

/**
 * platform_msi_device_domain_alloc - Allocate interrupts associated with
 *				      a platform-msi device domain
 *
 * @domain:	The platform-msi device domain
 * @virq:	The base irq from which to perform the allocate operation
 * @nr_irqs:	How many interrupts to allocate from @virq
 *
 * Return 0 on success, or an error code on failure. Must be called
 * with irq_domain_mutex held (which can only be done as part of a
 * top-level interrupt allocation).
 */
int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int virq,
				     unsigned int nr_irqs)
{
	struct platform_msi_priv_data *data = domain->host_data;
	struct device *dev = data->dev;

	return msi_domain_populate_irqs(domain->parent, dev, virq, nr_irqs, &data->arg);
}

/* End of removal area */

/* Real per device domain interfaces */

/*
 * This indirection can go when platform_device_msi_init_and_alloc_irqs()
@@ -357,7 +23,7 @@ static void platform_msi_write_msi_msg(struct irq_data *d, struct msi_msg *msg)
	cb(irq_data_get_msi_desc(d), msg);
}

static void platform_msi_set_desc_byindex(msi_alloc_info_t *arg, struct msi_desc *desc)
static void platform_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
{
	arg->desc = desc;
	arg->hwirq = desc->msi_index;
@@ -373,7 +39,7 @@ static const struct msi_domain_template platform_msi_template = {
	},

	.ops = {
		.set_desc		= platform_msi_set_desc_byindex,
		.set_desc		= platform_msi_set_desc,
	},

	.info = {
@@ -408,10 +74,6 @@ int platform_device_msi_init_and_alloc_irqs(struct device *dev, unsigned int nve
	if (!domain || !write_msi_msg)
		return -EINVAL;

	/* Migration support. Will go away once everything is converted */
	if (!irq_domain_is_msi_parent(domain))
		return platform_msi_domain_alloc_irqs(dev, nvec, write_msi_msg);

	/*
	 * @write_msi_msg is stored in the resulting msi_domain_info::data.
	 * The underlying domain creation mechanism will assign that
@@ -432,12 +94,6 @@ EXPORT_SYMBOL_GPL(platform_device_msi_init_and_alloc_irqs);
 */
void platform_device_msi_free_irqs_all(struct device *dev)
{
	struct irq_domain *domain = dev->msi.domain;

	msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN);

	/* Migration support. Will go away once everything is converted */
	if (!irq_domain_is_msi_parent(domain))
		platform_msi_free_priv_data(dev);
}
EXPORT_SYMBOL_GPL(platform_device_msi_free_irqs_all);
+8 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ config ARM_GIC_V2M
	bool
	depends on PCI
	select ARM_GIC
	select IRQ_MSI_LIB
	select PCI_MSI

config GIC_NON_BANKED
@@ -41,6 +42,7 @@ config ARM_GIC_V3
config ARM_GIC_V3_ITS
	bool
	select GENERIC_MSI_IRQ
	select IRQ_MSI_LIB
	default ARM_GIC_V3

config ARM_GIC_V3_ITS_PCI
@@ -74,6 +76,9 @@ config ARM_VIC_NR
	  The maximum number of VICs available in the system, for
	  power management.

config IRQ_MSI_LIB
	bool

config ARMADA_370_XP_IRQ
	bool
	select GENERIC_IRQ_CHIP
@@ -378,6 +383,7 @@ config MSCC_OCELOT_IRQ
	select GENERIC_IRQ_CHIP

config MVEBU_GICP
	select IRQ_MSI_LIB
	bool

config MVEBU_ICU
@@ -385,6 +391,7 @@ config MVEBU_ICU

config MVEBU_ODMI
	bool
	select IRQ_MSI_LIB
	select GENERIC_MSI_IRQ

config MVEBU_PIC
@@ -508,6 +515,7 @@ config IMX_MU_MSI
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_MSI_IRQ
	select IRQ_MSI_LIB
	help
	  Provide a driver for the i.MX Messaging Unit block used as a
	  CPU-to-CPU MSI controller. This requires a specially crafted DT
+2 −2
Original line number Diff line number Diff line
@@ -29,10 +29,10 @@ obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o
obj-$(CONFIG_ARM_GIC)			+= irq-gic.o irq-gic-common.o
obj-$(CONFIG_ARM_GIC_PM)		+= irq-gic-pm.o
obj-$(CONFIG_ARCH_REALVIEW)		+= irq-gic-realview.o
obj-$(CONFIG_IRQ_MSI_LIB)		+= irq-msi-lib.o
obj-$(CONFIG_ARM_GIC_V2M)		+= irq-gic-v2m.o
obj-$(CONFIG_ARM_GIC_V3)		+= irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o
obj-$(CONFIG_ARM_GIC_V3_ITS)		+= irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
obj-$(CONFIG_ARM_GIC_V3_ITS_PCI)	+= irq-gic-v3-its-pci-msi.o
obj-$(CONFIG_ARM_GIC_V3_ITS)		+= irq-gic-v3-its.o irq-gic-v4.o irq-gic-v3-its-msi-parent.o
obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC)	+= irq-gic-v3-its-fsl-mc-msi.o
obj-$(CONFIG_PARTITION_PERCPU)		+= irq-partition-percpu.o
obj-$(CONFIG_HISILICON_IRQ_MBIGEN)	+= irq-mbigen.o
+3 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@

#include <linux/of.h>
#include <linux/irqdomain.h>
#include <linux/msi.h>
#include <linux/irqchip/arm-gic-common.h>

struct gic_quirk {
@@ -28,6 +29,8 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
void gic_enable_of_quirks(const struct device_node *np,
			  const struct gic_quirk *quirks, void *data);

extern const struct msi_parent_ops gic_v3_its_msi_parent_ops;

#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING    (1 << 0)
#define RDIST_FLAGS_RD_TABLES_PREALLOCATED     (1 << 1)
#define RDIST_FLAGS_FORCE_NON_SHAREABLE        (1 << 2)
+25 −56
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@
#include <linux/irqchip/arm-gic.h>
#include <linux/irqchip/arm-gic-common.h>

#include "irq-msi-lib.h"

/*
* MSI_TYPER:
*     [31:26] Reserved
@@ -72,31 +74,6 @@ struct v2m_data {
	u32 flags;		/* v2m flags for specific implementation */
};

static void gicv2m_mask_msi_irq(struct irq_data *d)
{
	pci_msi_mask_irq(d);
	irq_chip_mask_parent(d);
}

static void gicv2m_unmask_msi_irq(struct irq_data *d)
{
	pci_msi_unmask_irq(d);
	irq_chip_unmask_parent(d);
}

static struct irq_chip gicv2m_msi_irq_chip = {
	.name			= "MSI",
	.irq_mask		= gicv2m_mask_msi_irq,
	.irq_unmask		= gicv2m_unmask_msi_irq,
	.irq_eoi		= irq_chip_eoi_parent,
};

static struct msi_domain_info gicv2m_msi_domain_info = {
	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
		   MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
	.chip	= &gicv2m_msi_irq_chip,
};

static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq)
{
	if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY)
@@ -230,6 +207,7 @@ static void gicv2m_irq_domain_free(struct irq_domain *domain,
}

static const struct irq_domain_ops gicv2m_domain_ops = {
	.select			= msi_lib_irq_domain_select,
	.alloc			= gicv2m_irq_domain_alloc,
	.free			= gicv2m_irq_domain_free,
};
@@ -250,19 +228,6 @@ static bool is_msi_spi_valid(u32 base, u32 num)
	return true;
}

static struct irq_chip gicv2m_pmsi_irq_chip = {
	.name			= "pMSI",
};

static struct msi_domain_ops gicv2m_pmsi_ops = {
};

static struct msi_domain_info gicv2m_pmsi_domain_info = {
	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
	.ops	= &gicv2m_pmsi_ops,
	.chip	= &gicv2m_pmsi_irq_chip,
};

static void __init gicv2m_teardown(void)
{
	struct v2m_data *v2m, *tmp;
@@ -278,9 +243,27 @@ static void __init gicv2m_teardown(void)
	}
}


#define GICV2M_MSI_FLAGS_REQUIRED  (MSI_FLAG_USE_DEF_DOM_OPS |		\
				    MSI_FLAG_USE_DEF_CHIP_OPS |		\
				    MSI_FLAG_PCI_MSI_MASK_PARENT)

#define GICV2M_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK |	\
				    MSI_FLAG_PCI_MSIX      |	\
				    MSI_FLAG_MULTI_PCI_MSI)

static struct msi_parent_ops gicv2m_msi_parent_ops = {
	.supported_flags	= GICV2M_MSI_FLAGS_SUPPORTED,
	.required_flags		= GICV2M_MSI_FLAGS_REQUIRED,
	.bus_select_token	= DOMAIN_BUS_NEXUS,
	.bus_select_mask	= MATCH_PCI_MSI | MATCH_PLATFORM_MSI,
	.prefix			= "GICv2m-",
	.init_dev_msi_info	= msi_lib_init_dev_msi_info,
};

static __init int gicv2m_allocate_domains(struct irq_domain *parent)
{
	struct irq_domain *inner_domain, *pci_domain, *plat_domain;
	struct irq_domain *inner_domain;
	struct v2m_data *v2m;

	v2m = list_first_entry_or_null(&v2m_nodes, struct v2m_data, entry);
@@ -295,22 +278,8 @@ static __init int gicv2m_allocate_domains(struct irq_domain *parent)
	}

	irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS);
	pci_domain = pci_msi_create_irq_domain(v2m->fwnode,
					       &gicv2m_msi_domain_info,
					       inner_domain);
	plat_domain = platform_msi_create_irq_domain(v2m->fwnode,
						     &gicv2m_pmsi_domain_info,
						     inner_domain);
	if (!pci_domain || !plat_domain) {
		pr_err("Failed to create MSI domains\n");
		if (plat_domain)
			irq_domain_remove(plat_domain);
		if (pci_domain)
			irq_domain_remove(pci_domain);
		irq_domain_remove(inner_domain);
		return -ENOMEM;
	}

	inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
	inner_domain->msi_parent_ops = &gicv2m_msi_parent_ops;
	return 0;
}

@@ -511,7 +480,7 @@ acpi_parse_madt_msi(union acpi_subtable_headers *header,
		pr_info("applying Amazon Graviton quirk\n");
		res.end = res.start + SZ_8K - 1;
		flags |= GICV2M_GRAVITON_ADDRESS_ONLY;
		gicv2m_msi_domain_info.flags &= ~MSI_FLAG_MULTI_PCI_MSI;
		gicv2m_msi_parent_ops.supported_flags &= ~MSI_FLAG_MULTI_PCI_MSI;
	}

	if (m->flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {
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