Commit 6717746f authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski
Browse files

net: stmmac: mdio: provide priv->gmii_address_bus_config 



Provide a pre-formatted value for the MDIO address register fields
which remain constant across the various different transactions
rather than recreating the register value from scratch every time.
Currently, we only do this for the CR (clock range) field.

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarMohd Ayaan Anwar <quic_mohdayaa@quicinc.com>
Link: https://patch.msgid.link/E1uu8o2-00000001vog-1LyK@rmk-PC.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9eb633ad

drivers/net/ethernet/stmicro/stmmac/stmmac.h

+1 −0
Original line number Diff line number Diff line
@@ -290,6 +290,7 @@ struct stmmac_priv { 
	int wolopts;

	int wol_irq;

	int clk_csr;

	u32 gmii_address_bus_config;

	struct timer_list eee_ctrl_timer;

	int lpi_irq;

	u32 tx_lpi_timer;

drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c

+17 −9
Original line number Diff line number Diff line
@@ -104,9 +104,7 @@ static int stmmac_xgmac2_mdio_read(struct stmmac_priv *priv, u32 addr, 
	if (ret)

		goto err_disable_clks;



	value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)

		& priv->hw->mii.clk_csr_mask;

	value |= MII_XGMAC_READ;

	value |= priv->gmii_address_bus_config | MII_XGMAC_READ;



	/* Wait until any existing MII operation is complete */

	ret = stmmac_mdio_wait(priv->ioaddr + mii_data, MII_XGMAC_BUSY);
@@ -174,10 +172,7 @@ static int stmmac_xgmac2_mdio_write(struct stmmac_priv *priv, u32 addr, 
	if (ret)

		goto err_disable_clks;



	value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)

		& priv->hw->mii.clk_csr_mask;

	value |= phydata;

	value |= MII_XGMAC_WRITE;

	value |= priv->gmii_address_bus_config | phydata | MII_XGMAC_WRITE;



	/* Wait until any existing MII operation is complete */

	ret = stmmac_mdio_wait(priv->ioaddr + mii_data, MII_XGMAC_BUSY);
@@ -241,8 +236,7 @@ static u32 stmmac_mdio_format_addr(struct stmmac_priv *priv, 


	return ((pa << mii_regs->addr_shift) & mii_regs->addr_mask) |

	       ((gr << mii_regs->reg_shift) & mii_regs->reg_mask) |

	       ((priv->clk_csr << mii_regs->clk_csr_shift) &

		mii_regs->clk_csr_mask) |

	       priv->gmii_address_bus_config |

	       MII_BUSY;

}
@@ -517,6 +511,18 @@ void stmmac_pcs_clean(struct net_device *ndev) 
	priv->hw->xpcs = NULL;

}



static void stmmac_mdio_bus_config(struct stmmac_priv *priv, u32 value)

{

	value <<= priv->hw->mii.clk_csr_shift;



	if (value & ~priv->hw->mii.clk_csr_mask)

		dev_warn(priv->device,

			 "clk_csr value out of range (0x%08x exceeds mask 0x%08x), truncating\n",

			 value, priv->hw->mii.clk_csr_mask);



	priv->gmii_address_bus_config = value & priv->hw->mii.clk_csr_mask;

}



/**

 * stmmac_mdio_register

 * @ndev: net device structure
@@ -537,6 +543,8 @@ int stmmac_mdio_register(struct net_device *ndev) 
	if (!mdio_bus_data)

		return 0;



	stmmac_mdio_bus_config(priv, priv->clk_csr);



	new_bus = mdiobus_alloc();

	if (!new_bus)

		return -ENOMEM;