Commit 672d644a authored by Rob Herring (Arm)'s avatar Rob Herring (Arm) Committed by Bartosz Golaszewski
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dt-bindings: gpio: Convert apm,xgene-gpio-sb to DT schema 



Convert APM X-Gene Standby GPIO binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250714202821.3011099-1-robh@kernel.org


Signed-off-by: default avatarBartosz Golaszewski <bartosz.golaszewski@linaro.org>
parent 842dcff8

Documentation/devicetree/bindings/gpio/apm,xgene-gpio-sb.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/apm,xgene-gpio-sb.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: APM X-Gene Standby GPIO controller



maintainers:

  - Khuong Dinh <khuong@os.amperecomputing.com>



description: |

  This is a gpio controller in the standby domain. It also supports interrupt in

  some particular pins which are sourced to its parent interrupt controller

  as diagram below:

                                +-----------------+

                                | X-Gene standby  |

                                | GPIO controller +------ GPIO_0

    +------------+              |                 | ...

    | Parent IRQ | EXT_INT_0    |                 +------ GPIO_8/EXT_INT_0

    | controller | (SPI40)      |                 | ...

    | (GICv2)    +--------------+                 +------ GPIO_[N+8]/EXT_INT_N

    |            |   ...        |                 |

    |            | EXT_INT_N    |                 +------ GPIO_[N+9]

    |            | (SPI[40 + N])|                 | ...

    |            +--------------+                 +------ GPIO_MAX

    +------------+              +-----------------+



properties:

  compatible:

    const: apm,xgene-gpio-sb



  reg:

    maxItems: 1



  '#gpio-cells':

    const: 2



  gpio-controller: true



  interrupts:

    description:

      List of interrupt specifiers for EXT_INT_0 through EXT_INT_N. The first

      entry must correspond to EXT_INT_0.



  '#interrupt-cells':

    const: 2

    description:

      First cell selects EXT_INT_N (0-N), second cell specifies flags



  interrupt-controller: true



  apm,nr-gpios:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Number of GPIO pins



  apm,nr-irqs:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Number of interrupt pins



  apm,irq-start:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Lowest GPIO pin supporting interrupts



required:

  - compatible

  - reg

  - '#gpio-cells'

  - gpio-controller

  - interrupts

  - '#interrupt-cells'

  - interrupt-controller



additionalProperties: false



examples:

  - |

    gpio@17001000 {

        compatible = "apm,xgene-gpio-sb";

        reg = <0x17001000 0x400>;

        #gpio-cells = <2>;

        gpio-controller;

        interrupts = <0x0 0x28 0x1>,

                     <0x0 0x29 0x1>,

                     <0x0 0x2a 0x1>,

                     <0x0 0x2b 0x1>,

                     <0x0 0x2c 0x1>,

                     <0x0 0x2d 0x1>;

        #interrupt-cells = <2>;

        interrupt-controller;

        apm,nr-gpios = <22>;

        apm,nr-irqs = <6>;

        apm,irq-start = <8>;

    };

Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt

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APM X-Gene Standby GPIO controller bindings



This is a gpio controller in the standby domain. It also supports interrupt in

some particular pins which are sourced to its parent interrupt controller

as diagram below:

                            +-----------------+

                            | X-Gene standby  |

                            | GPIO controller +------ GPIO_0

+------------+              |                 | ...

| Parent IRQ | EXT_INT_0    |                 +------ GPIO_8/EXT_INT_0

| controller | (SPI40)      |                 | ...

| (GICv2)    +--------------+                 +------ GPIO_[N+8]/EXT_INT_N

|            |   ...        |                 |

|            | EXT_INT_N    |                 +------ GPIO_[N+9]

|            | (SPI[40 + N])|                 | ...

|            +--------------+                 +------ GPIO_MAX

+------------+              +-----------------+



Required properties:

- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller

- reg: Physical base address and size of the controller's registers

- #gpio-cells: Should be two.

	- first cell is the pin number

	- second cell is used to specify the gpio polarity:

		0 = active high

		1 = active low

- gpio-controller: Marks the device node as a GPIO controller.

- interrupts: The EXT_INT_0 parent interrupt resource must be listed first.

- interrupt-cells: Should be two.

       - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N.

       - second cell is used to specify flags.

- interrupt-controller: Marks the device node as an interrupt controller.

- apm,nr-gpios: Optional, specify number of gpios pin.

- apm,nr-irqs: Optional, specify number of interrupt pins.

- apm,irq-start: Optional, specify lowest gpio pin support interrupt.



Example:

	sbgpio: gpio@17001000{

		compatible = "apm,xgene-gpio-sb";

		reg = <0x0 0x17001000 0x0 0x400>;

		#gpio-cells = <2>;

		gpio-controller;

		interrupts = 	<0x0 0x28 0x1>,

				<0x0 0x29 0x1>,

				<0x0 0x2a 0x1>,

				<0x0 0x2b 0x1>,

				<0x0 0x2c 0x1>,

				<0x0 0x2d 0x1>;

		interrupt-parent = <&gic>;

		#interrupt-cells = <2>;

		interrupt-controller;

		apm,nr-gpios = <22>;

		apm,nr-irqs = <6>;

		apm,irq-start = <8>;

	};



	testuser {

		compatible = "example,testuser";

		/* Use the GPIO_13/EXT_INT_5 line as an active high triggered

		 * level interrupt

		 */

		interrupts = <5 4>;

		interrupt-parent = <&sbgpio>;

	};