Commit 67577e2e authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/dsb: Document that the ATS fault bits are for mtl+ 



The ATS faults have something to do with some new iommu stuff
on mtl+. Document that the relevant DSB interrupt bits aren't
valid for earlier platforms.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-11-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 5bdd7801

drivers/gpu/drm/i915/display/intel_dsb_regs.h

+2 −2
Original line number Diff line number Diff line
@@ -51,12 +51,12 @@ 
#define   DSB_RESET_SM_STATE_MASK	REG_GENMASK(5, 4)

#define   DSB_RUN_SM_STATE_MASK		REG_GENMASK(2, 0)

#define DSB_INTERRUPT(pipe, id)		_MMIO(DSBSL_INSTANCE(pipe, id) + 0x28)

#define   DSB_ATS_FAULT_INT_EN		REG_BIT(20)

#define   DSB_ATS_FAULT_INT_EN		REG_BIT(20) /* mtl+ */

#define   DSB_GTT_FAULT_INT_EN		REG_BIT(19)

#define   DSB_RSPTIMEOUT_INT_EN		REG_BIT(18)

#define   DSB_POLL_ERR_INT_EN		REG_BIT(17)

#define   DSB_PROG_INT_EN		REG_BIT(16)

#define   DSB_ATS_FAULT_INT_STATUS	REG_BIT(4)

#define   DSB_ATS_FAULT_INT_STATUS	REG_BIT(4) /* mtl+ */

#define   DSB_GTT_FAULT_INT_STATUS	REG_BIT(3)

#define   DSB_RSPTIMEOUT_INT_STATUS	REG_BIT(2)

#define   DSB_POLL_ERR_INT_STATUS	REG_BIT(1)