Commit 6901f732 authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Rodrigo Vivi
Browse files

drm/xe: Add command MI_LOAD_REGISTER_MEM 



We will need this shortly during context state preparation.

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231214185955.1791-2-michal.wajdeczko@intel.com


Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
parent 4e124151

drivers/gpu/drm/xe/instructions/xe_mi_commands.h

+3 −0
Original line number Diff line number Diff line
@@ -56,6 +56,9 @@ 
#define   MI_FLUSH_IMM_QW		REG_FIELD_PREP(MI_FLUSH_DW_LEN_DW, 5 - 2)

#define   MI_FLUSH_DW_USE_GTT		REG_BIT(2)



#define MI_LOAD_REGISTER_MEM		(__MI_INSTR(0x29) | XE_INSTR_NUM_DW(4))

#define   MI_LRM_USE_GGTT		REG_BIT(22)



#define MI_BATCH_BUFFER_START		__MI_INSTR(0x31)



#endif

drivers/gpu/drm/xe/xe_lrc.c

+14 −0
Original line number Diff line number Diff line
@@ -964,6 +964,20 @@ static int dump_mi_command(struct drm_printer *p, 
			drm_printf(p, " - %#6x = %#010x\n", dw[i], dw[i + 1]);

		return numdw;



	case MI_LOAD_REGISTER_MEM & MI_OPCODE:

		drm_printf(p, "[%#010x] MI_LOAD_REGISTER_MEM: %s%s\n",

			   inst_header,

			   dw[0] & MI_LRI_LRM_CS_MMIO ? "CS_MMIO " : "",

			   dw[0] & MI_LRM_USE_GGTT ? "USE_GGTT " : "");

		if (numdw == 4)

			drm_printf(p, " - %#6x = %#010llx\n",

				   dw[1], ((u64)(dw[3]) << 32 | (u64)(dw[2])));

		else

			drm_printf(p, " - %*ph (%s)\n",

				   (int)sizeof(u32) * (numdw - 1), dw + 1,

				   numdw < 4 ? "truncated" : "malformed");

		return numdw;



	case MI_FORCE_WAKEUP:

		drm_printf(p, "[%#010x] MI_FORCE_WAKEUP\n", inst_header);

		return numdw;