Commit 6b481af2 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Martin K. Petersen
Browse files

scsi: ufs: qcom: Simplify ufs_qcom_{assert/deassert}_reset 



In both the functions, UFS_PHY_SOFT_RESET contains the mask of the reset
bit. So this can be passed directly as the value to be written for
asserting the reset. For deasserting, 0 can be passed.

This gets rid of the FIELD_PREP() inside these functions and also
UFS_PHY_RESET_{ENABLE/DISABLE} definitions.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20231208065902.11006-15-manivannan.sadhasivam@linaro.org


Reviewed-by: default avatarAndrew Halaney <ahalaney@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8775p-ride
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 3b60f456

drivers/ufs/host/ufs-qcom.h

+2 −7
Original line number Diff line number Diff line
@@ -92,9 +92,6 @@ enum { 
#define TEST_BUS_SEL		GENMASK(22, 19)

#define UFS_REG_TEST_BUS_EN	BIT(30)



#define UFS_PHY_RESET_ENABLE	1

#define UFS_PHY_RESET_DISABLE	0



/* bit definitions for REG_UFS_CFG2 register */

#define UAWM_HW_CGC_EN		BIT(0)

#define UARM_HW_CGC_EN		BIT(1)
@@ -157,8 +154,7 @@ ufs_qcom_get_controller_revision(struct ufs_hba *hba, 


static inline void ufs_qcom_assert_reset(struct ufs_hba *hba)

{

	ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_ENABLE),

		    REG_UFS_CFG1);

	ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, UFS_PHY_SOFT_RESET, REG_UFS_CFG1);



	/*

	 * Make sure assertion of ufs phy reset is written to
@@ -169,8 +165,7 @@ static inline void ufs_qcom_assert_reset(struct ufs_hba *hba) 


static inline void ufs_qcom_deassert_reset(struct ufs_hba *hba)

{

	ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_DISABLE),

		    REG_UFS_CFG1);

	ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, 0, REG_UFS_CFG1);



	/*

	 * Make sure de-assertion of ufs phy reset is written to