Commit 6cbe6e07 authored by Timur Kristóf's avatar Timur Kristóf Committed by Alex Deucher
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drm/amd/display: Don't use non-registered VUPDATE on DCE 6



The VUPDATE interrupt isn't registered on DCE 6, so don't try
to use that.

This fixes a page flip timeout after sleep/resume on DCE 6.

Signed-off-by: default avatarTimur Kristóf <timur.kristof@gmail.com>
Reviewed-by: default avatarRodrigo Siqueira <siqueira@igalia.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 043c87d7
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+14 −8
Original line number Diff line number Diff line
@@ -3047,14 +3047,20 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,
				drm_warn(adev_to_drm(adev), "Failed to %s pflip interrupts\n",
					 enable ? "enable" : "disable");

			if (dc_supports_vrr(adev->dm.dc->ctx->dce_version)) {
				if (enable) {
				if (amdgpu_dm_crtc_vrr_active(to_dm_crtc_state(acrtc->base.state)))
					rc = amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, true);
					if (amdgpu_dm_crtc_vrr_active(
							to_dm_crtc_state(acrtc->base.state)))
						rc = amdgpu_dm_crtc_set_vupdate_irq(
							&acrtc->base, true);
				} else
				rc = amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, false);
					rc = amdgpu_dm_crtc_set_vupdate_irq(
							&acrtc->base, false);

				if (rc)
				drm_warn(adev_to_drm(adev), "Failed to %sable vupdate interrupt\n", enable ? "en" : "dis");
					drm_warn(adev_to_drm(adev), "Failed to %sable vupdate interrupt\n",
						enable ? "en" : "dis");
			}

			irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst;
			/* During gpu-reset we disable and then enable vblank irq, so
+10 −6
Original line number Diff line number Diff line
@@ -317,7 +317,10 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)
			dc->config.disable_ips != DMUB_IPS_DISABLE_ALL &&
			sr_supported && vblank->config.disable_immediate)
			drm_crtc_vblank_restore(crtc);
	}

	if (dc_supports_vrr(dm->dc->ctx->dce_version)) {
		if (enable) {
			/* vblank irq on -> Only need vupdate irq in vrr mode */
			if (amdgpu_dm_crtc_vrr_active(acrtc_state))
				rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);
@@ -325,6 +328,7 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)
			/* vblank irq off -> vupdate irq off */
			rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);
		}
	}

	if (rc)
		return rc;