Commit 6dee64e7 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Fix xgmi v6.4.1 link status reporting 



Use the right register offsets for getting link status.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarAsad Kamal <asad.kamal@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d53a64e9

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

+18 −6
Original line number Diff line number Diff line
@@ -296,15 +296,27 @@ static const struct amdgpu_pcs_ras_field xgmi3x16_pcs_ras_fields[] = { 


static u32 xgmi_v6_4_get_link_status(struct amdgpu_device *adev, int global_link_num)

{

	const u32 smnpcs_xgmi3x16_pcs_state_hist1 = 0x11a00070;

	const int xgmi_inst = 2;

	u32 link_inst;

	const u32 smn_xgmi_6_4_pcs_state_hist1[2] = { 0x11a00070, 0x11b00070 };

	const u32 smn_xgmi_6_4_1_pcs_state_hist1[2] = { 0x11b00070,

							0x12100070 };

	u32 i, n;

	u64 addr;



	link_inst = global_link_num % xgmi_inst;

	switch (amdgpu_ip_version(adev, XGMI_HWIP, 0)) {

	case IP_VERSION(6, 4, 0):

		n = ARRAY_SIZE(smn_xgmi_6_4_pcs_state_hist1);

		addr = smn_xgmi_6_4_pcs_state_hist1[global_link_num % n];

		break;

	case IP_VERSION(6, 4, 1):

		n = ARRAY_SIZE(smn_xgmi_6_4_1_pcs_state_hist1);

		addr = smn_xgmi_6_4_1_pcs_state_hist1[global_link_num % n];

		break;

	default:

		return U32_MAX;

	}



	addr = (smnpcs_xgmi3x16_pcs_state_hist1 | (link_inst << 20)) +

		adev->asic_funcs->encode_ext_smn_addressing(global_link_num / xgmi_inst);

	i = global_link_num / n;

	addr += adev->asic_funcs->encode_ext_smn_addressing(i);



	return RREG32_PCIE_EXT(addr);

}