Unverified Commit 6eb6b62f authored by Mark Brown's avatar Mark Brown
Browse files

regulator: core: allow regulator_register() with

Merge series from André Draszik <andre.draszik@linaro.org>:

With these attached patches it becomes possible again to support
hardware designs with multiple PMICs where individual rails of each act
as required supplies for rails of the other (due to the latter being
e.g. always-on), and vice-versa.

Google Pixel 6 and 6 Pro (oriole and raven) are examples of such
designs.

Rather than returning -EPORBE_DEFER in regulator_register() when
set_machine_constraints() fails with -EPROBE_DEFER (due to missing
required supplies), we still allow rail registration and try to
reresolve supplies each time a new rail gets registered.

This is implemented using a bus (regulator bus), which allows the core
to reresolve supplies for regulators that still need them whenever new
regulators (i.e. devices) are added.

Using a bus also solves existing problems around late resolution of
supplies as mentioned in the commit message introducing that bus.

The series starts with a few bug fixes and the last two commits
implement the changes mentioned above, but do depend on the bug fixes.
parents b0655377 8d38423d
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -748,6 +748,7 @@ ForEachMacros:
  - 'ynl_attr_for_each_nested'
  - 'ynl_attr_for_each_payload'
  - 'zorro_for_each_dev'
  - 'zpci_bus_for_each'

IncludeBlocks: Preserve
IncludeCategories:
+2 −2
Original line number Diff line number Diff line
@@ -127,7 +127,8 @@ Barry Song <baohua@kernel.org> <Baohua.Song@csr.com>
Barry Song <baohua@kernel.org> <barry.song@analog.com>
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@sandisk.com>
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com>
Bartosz Golaszewski <brgl@bgdev.pl> <bgolaszewski@baylibre.com>
Bartosz Golaszewski <brgl@kernel.org> <bartosz.golaszewski@linaro.org>
Bartosz Golaszewski <brgl@kernel.org> <bgolaszewski@baylibre.com>
Ben Dooks <ben-linux@fluff.org> <ben.dooks@simtec.co.uk>
Ben Dooks <ben-linux@fluff.org> <ben.dooks@sifive.com>
Ben Gardner <bgardner@wabtec.com>
@@ -857,7 +858,6 @@ Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
WangYuli <wangyuli@aosc.io> <wangyl5933@chinaunicom.cn>
WangYuli <wangyuli@aosc.io> <wangyuli@deepin.org>
WangYuli <wangyuli@aosc.io> <wangyuli@uniontech.com>
Weiwen Hu <huweiwen@linux.alibaba.com> <sehuww@mail.scut.edu.cn>
WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com>
Wen Gong <quic_wgong@quicinc.com> <wgong@codeaurora.org>
+1 −0
Original line number Diff line number Diff line
@@ -1987,6 +1987,7 @@ D: netfilter: TCP window tracking code
D: netfilter: raw table
D: netfilter: iprange match
D: netfilter: new logging interfaces
D: netfilter: ipset
D: netfilter: various other hacks
S: Tata
S: Hungary
+1 −1
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@ MB and a zone capacity of 63 MB::

        $ modprobe zloop
        $ mkdir -p /var/local/zloop/0
        $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity=63MB" > /dev/zloop-control
        $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity_mb=63" > /dev/zloop-control

For the device created (/dev/zloop0), the zone backing files are all created
under the default base directory (/var/local/zloop)::
+8 −0
Original line number Diff line number Diff line
@@ -281,6 +281,14 @@ The following keys are defined:
  * :c:macro:`RISCV_HWPROBE_EXT_ZICBOP`: The Zicbop extension is supported, as
       ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.

  * :c:macro:`RISCV_HWPROBE_EXT_ZILSD`: The Zilsd extension is supported as
       defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating
       load/store pair for RV32 with the main manual") of the riscv-isa-manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZCLSD`: The Zclsd extension is supported as
       defined in the RISC-V ISA manual starting from commit f88abf1 ("Integrating
       load/store pair for RV32 with the main manual") of the riscv-isa-manual.

* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated.  Returns similar values to
     :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
     mistakenly classified as a bitmask rather than a value.
Loading