Commit 6f3d9d0d authored by Ryosuke Yasuoka's avatar Ryosuke Yasuoka Committed by Dmitry Osipenko
Browse files

drm/virtio: Add drm_panic support 



Virtio gpu supports the drm_panic module, which displays a message to
the screen when a kernel panic occurs. It is supported where it has
vmapped shmem BO.

Signed-off-by: default avatarJocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: default avatarRyosuke Yasuoka <ryasuoka@redhat.com>
Tested-by: default avatarDmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: default avatarDmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: default avatarDmitry Osipenko <dmitry.osipenko@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250206104300.416014-1-ryasuoka@redhat.com
parent 05345cea

drivers/gpu/drm/virtio/virtgpu_drv.h

+11 −0
Original line number Diff line number Diff line
@@ -310,6 +310,7 @@ int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 
				struct drm_device *dev,

				struct drm_mode_create_dumb *args);



struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void);

struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);

struct virtio_gpu_object_array*

virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
@@ -334,12 +335,21 @@ void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 
				    struct virtio_gpu_fence *fence);

void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,

				   struct virtio_gpu_object *bo);

int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,

					     uint64_t offset,

					     uint32_t width, uint32_t height,

					     uint32_t x, uint32_t y,

					     struct virtio_gpu_object_array *objs);

void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,

					uint64_t offset,

					uint32_t width, uint32_t height,

					uint32_t x, uint32_t y,

					struct virtio_gpu_object_array *objs,

					struct virtio_gpu_fence *fence);

void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev,

					 uint32_t resource_id,

					 uint32_t x, uint32_t y,

					 uint32_t width, uint32_t height);

void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,

				   uint32_t resource_id,

				   uint32_t x, uint32_t y,
@@ -408,6 +418,7 @@ void virtio_gpu_ctrl_ack(struct virtqueue *vq); 
void virtio_gpu_cursor_ack(struct virtqueue *vq);

void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);

void virtio_gpu_dequeue_cursor_func(struct work_struct *work);

void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev);

void virtio_gpu_notify(struct virtio_gpu_device *vgdev);



int

drivers/gpu/drm/virtio/virtgpu_gem.c

+14 −0
Original line number Diff line number Diff line
@@ -148,6 +148,20 @@ void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 
	virtio_gpu_notify(vgdev);

}



/* For drm panic */

struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void)

{

	struct virtio_gpu_object_array *objs;



	objs = kmalloc(sizeof(struct virtio_gpu_object_array), GFP_ATOMIC);

	if (!objs)

		return NULL;



	objs->nents = 0;

	objs->total = 1;

	return objs;

}



struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)

{

	struct virtio_gpu_object_array *objs;

drivers/gpu/drm/virtio/virtgpu_plane.c

+96 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@ 
#include <drm/drm_fourcc.h>

#include <drm/drm_gem_atomic_helper.h>

#include <linux/virtio_dma_buf.h>

#include <drm/drm_managed.h>

#include <drm/drm_panic.h>



#include "virtgpu_drv.h"
@@ -127,6 +129,30 @@ static int virtio_gpu_plane_atomic_check(struct drm_plane *plane, 
	return ret;

}



/* For drm panic */

static int virtio_gpu_panic_update_dumb_bo(struct virtio_gpu_device *vgdev,

					   struct drm_plane_state *state,

					   struct drm_rect *rect)

{

	struct virtio_gpu_object *bo =

		gem_to_virtio_gpu_obj(state->fb->obj[0]);

	struct virtio_gpu_object_array *objs;

	uint32_t w = rect->x2 - rect->x1;

	uint32_t h = rect->y2 - rect->y1;

	uint32_t x = rect->x1;

	uint32_t y = rect->y1;

	uint32_t off = x * state->fb->format->cpp[0] +

		y * state->fb->pitches[0];



	objs = virtio_gpu_panic_array_alloc();

	if (!objs)

		return -ENOMEM;

	virtio_gpu_array_add_obj(objs, &bo->base.base);



	return virtio_gpu_panic_cmd_transfer_to_host_2d(vgdev, off, w, h, x, y,

							objs);

}



static void virtio_gpu_update_dumb_bo(struct virtio_gpu_device *vgdev,

				      struct drm_plane_state *state,

				      struct drm_rect *rect)
@@ -150,6 +176,24 @@ static void virtio_gpu_update_dumb_bo(struct virtio_gpu_device *vgdev, 
					   objs, NULL);

}



/* For drm_panic */

static void virtio_gpu_panic_resource_flush(struct drm_plane *plane,

					    uint32_t x, uint32_t y,

					    uint32_t width, uint32_t height)

{

	struct drm_device *dev = plane->dev;

	struct virtio_gpu_device *vgdev = dev->dev_private;

	struct virtio_gpu_framebuffer *vgfb;

	struct virtio_gpu_object *bo;



	vgfb = to_virtio_gpu_framebuffer(plane->state->fb);

	bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]);



	virtio_gpu_panic_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y,

					    width, height);

	virtio_gpu_panic_notify(vgdev);

}



static void virtio_gpu_resource_flush(struct drm_plane *plane,

				      uint32_t x, uint32_t y,

				      uint32_t width, uint32_t height)
@@ -446,11 +490,63 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, 
	virtio_gpu_cursor_ping(vgdev, output);

}



static int virtio_drm_get_scanout_buffer(struct drm_plane *plane,

					 struct drm_scanout_buffer *sb)

{

	struct virtio_gpu_object *bo;



	if (!plane->state || !plane->state->fb || !plane->state->visible)

		return -ENODEV;



	bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);



	/* Only support mapped shmem bo */

	if (virtio_gpu_is_vram(bo) || bo->base.base.import_attach || !bo->base.vaddr)

		return -ENODEV;



	iosys_map_set_vaddr(&sb->map[0], bo->base.vaddr);



	sb->format = plane->state->fb->format;

	sb->height = plane->state->fb->height;

	sb->width = plane->state->fb->width;

	sb->pitch[0] = plane->state->fb->pitches[0];

	return 0;

}



static void virtio_panic_flush(struct drm_plane *plane)

{

	struct virtio_gpu_object *bo;

	struct drm_device *dev = plane->dev;

	struct virtio_gpu_device *vgdev = dev->dev_private;

	struct drm_rect rect;



	rect.x1 = 0;

	rect.y1 = 0;

	rect.x2 = plane->state->fb->width;

	rect.y2 = plane->state->fb->height;



	bo = gem_to_virtio_gpu_obj(plane->state->fb->obj[0]);



	if (bo->dumb) {

		if (virtio_gpu_panic_update_dumb_bo(vgdev, plane->state,

						    &rect))

			return;

	}



	virtio_gpu_panic_resource_flush(plane,

					plane->state->src_x >> 16,

					plane->state->src_y >> 16,

					plane->state->src_w >> 16,

					plane->state->src_h >> 16);

}



static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {

	.prepare_fb		= virtio_gpu_plane_prepare_fb,

	.cleanup_fb		= virtio_gpu_plane_cleanup_fb,

	.atomic_check		= virtio_gpu_plane_atomic_check,

	.atomic_update		= virtio_gpu_primary_plane_update,

	.get_scanout_buffer	= virtio_drm_get_scanout_buffer,

	.panic_flush		= virtio_panic_flush,

};



static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {

drivers/gpu/drm/virtio/virtgpu_vq.c

+151 −0
Original line number Diff line number Diff line
@@ -86,6 +86,22 @@ void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev) 
	vgdev->vbufs = NULL;

}



/* For drm_panic */

static struct virtio_gpu_vbuffer*

virtio_gpu_panic_get_vbuf(struct virtio_gpu_device *vgdev, int size)

{

	struct virtio_gpu_vbuffer *vbuf;



	vbuf = kmem_cache_zalloc(vgdev->vbufs, GFP_ATOMIC);



	vbuf->buf = (void *)vbuf + sizeof(*vbuf);

	vbuf->size = size;

	vbuf->resp_cb = NULL;

	vbuf->resp_size = sizeof(struct virtio_gpu_ctrl_hdr);

	vbuf->resp_buf = (void *)vbuf->buf + size;

	return vbuf;

}



static struct virtio_gpu_vbuffer*

virtio_gpu_get_vbuf(struct virtio_gpu_device *vgdev,

		    int size, int resp_size, void *resp_buf,
@@ -137,6 +153,18 @@ virtio_gpu_alloc_cursor(struct virtio_gpu_device *vgdev, 
	return (struct virtio_gpu_update_cursor *)vbuf->buf;

}



/* For drm_panic */

static void *virtio_gpu_panic_alloc_cmd_resp(struct virtio_gpu_device *vgdev,

					     struct virtio_gpu_vbuffer **vbuffer_p,

					     int cmd_size)

{

	struct virtio_gpu_vbuffer *vbuf;



	vbuf = virtio_gpu_panic_get_vbuf(vgdev, cmd_size);

	*vbuffer_p = vbuf;

	return (struct virtio_gpu_command *)vbuf->buf;

}



static void *virtio_gpu_alloc_cmd_resp(struct virtio_gpu_device *vgdev,

				       virtio_gpu_resp_cb cb,

				       struct virtio_gpu_vbuffer **vbuffer_p,
@@ -311,6 +339,34 @@ static struct sg_table *vmalloc_to_sgt(char *data, uint32_t size, int *sg_ents) 
	return sgt;

}



/* For drm_panic */

static int virtio_gpu_panic_queue_ctrl_sgs(struct virtio_gpu_device *vgdev,

					   struct virtio_gpu_vbuffer *vbuf,

					   int elemcnt,

					   struct scatterlist **sgs,

					   int outcnt,

					   int incnt)

{

	struct virtqueue *vq = vgdev->ctrlq.vq;

	int ret;



	if (vgdev->has_indirect)

		elemcnt = 1;



	if (vq->num_free < elemcnt)

		return -ENOMEM;



	ret = virtqueue_add_sgs(vq, sgs, outcnt, incnt, vbuf, GFP_ATOMIC);

	WARN_ON(ret);



	vbuf->seqno = ++vgdev->ctrlq.seqno;

	trace_virtio_gpu_cmd_queue(vq, virtio_gpu_vbuf_ctrl_hdr(vbuf), vbuf->seqno);



	atomic_inc(&vgdev->pending_commands);



	return 0;

}



static int virtio_gpu_queue_ctrl_sgs(struct virtio_gpu_device *vgdev,

				     struct virtio_gpu_vbuffer *vbuf,

				     struct virtio_gpu_fence *fence,
@@ -368,6 +424,32 @@ static int virtio_gpu_queue_ctrl_sgs(struct virtio_gpu_device *vgdev, 
	return 0;

}



/* For drm_panic */

static int virtio_gpu_panic_queue_ctrl_buffer(struct virtio_gpu_device *vgdev,

					      struct virtio_gpu_vbuffer *vbuf)

{

	struct scatterlist *sgs[3], vcmd, vresp;

	int elemcnt = 0, outcnt = 0, incnt = 0;



	/* set up vcmd */

	sg_init_one(&vcmd, vbuf->buf, vbuf->size);

	elemcnt++;

	sgs[outcnt] = &vcmd;

	outcnt++;



	/* set up vresp */

	if (vbuf->resp_size) {

		sg_init_one(&vresp, vbuf->resp_buf, vbuf->resp_size);

		elemcnt++;

		sgs[outcnt + incnt] = &vresp;

		incnt++;

	}



	return virtio_gpu_panic_queue_ctrl_sgs(vgdev, vbuf,

					       elemcnt, sgs,

					       outcnt, incnt);

}



static int virtio_gpu_queue_fenced_ctrl_buffer(struct virtio_gpu_device *vgdev,

					       struct virtio_gpu_vbuffer *vbuf,

					       struct virtio_gpu_fence *fence)
@@ -422,6 +504,21 @@ static int virtio_gpu_queue_fenced_ctrl_buffer(struct virtio_gpu_device *vgdev, 
	return ret;

}



/* For drm_panic */

void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev)

{

	bool notify;



	if (!atomic_read(&vgdev->pending_commands))

		return;



	atomic_set(&vgdev->pending_commands, 0);

	notify = virtqueue_kick_prepare(vgdev->ctrlq.vq);



	if (notify)

		virtqueue_notify(vgdev->ctrlq.vq);

}



void virtio_gpu_notify(struct virtio_gpu_device *vgdev)

{

	bool notify;
@@ -567,6 +664,29 @@ void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 
	virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);

}



/* For drm_panic */

void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev,

					  uint32_t resource_id,

					  uint32_t x, uint32_t y,

					  uint32_t width, uint32_t height)

{

	struct virtio_gpu_resource_flush *cmd_p;

	struct virtio_gpu_vbuffer *vbuf;



	cmd_p = virtio_gpu_panic_alloc_cmd_resp(vgdev, &vbuf, sizeof(*cmd_p));

	memset(cmd_p, 0, sizeof(*cmd_p));

	vbuf->objs = NULL;



	cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_FLUSH);

	cmd_p->resource_id = cpu_to_le32(resource_id);

	cmd_p->r.width = cpu_to_le32(width);

	cmd_p->r.height = cpu_to_le32(height);

	cmd_p->r.x = cpu_to_le32(x);

	cmd_p->r.y = cpu_to_le32(y);



	virtio_gpu_panic_queue_ctrl_buffer(vgdev, vbuf);

}



void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,

				   uint32_t resource_id,

				   uint32_t x, uint32_t y,
@@ -591,6 +711,37 @@ void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 
	virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, fence);

}



/* For drm_panic */

int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,

					     uint64_t offset,

					     uint32_t width, uint32_t height,

					     uint32_t x, uint32_t y,

					     struct virtio_gpu_object_array *objs)

{

	struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(objs->objs[0]);

	struct virtio_gpu_transfer_to_host_2d *cmd_p;

	struct virtio_gpu_vbuffer *vbuf;

	bool use_dma_api = !virtio_has_dma_quirk(vgdev->vdev);



	if (virtio_gpu_is_shmem(bo) && use_dma_api)

		dma_sync_sgtable_for_device(vgdev->vdev->dev.parent,

					    bo->base.sgt, DMA_TO_DEVICE);



	cmd_p = virtio_gpu_panic_alloc_cmd_resp(vgdev, &vbuf, sizeof(*cmd_p));

	memset(cmd_p, 0, sizeof(*cmd_p));

	vbuf->objs = objs;



	cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D);

	cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);

	cmd_p->offset = cpu_to_le64(offset);

	cmd_p->r.width = cpu_to_le32(width);

	cmd_p->r.height = cpu_to_le32(height);

	cmd_p->r.x = cpu_to_le32(x);

	cmd_p->r.y = cpu_to_le32(y);



	return virtio_gpu_panic_queue_ctrl_buffer(vgdev, vbuf);

}



void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,

					uint64_t offset,

					uint32_t width, uint32_t height,