Commit 6fd016c9 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Vinod Koul
Browse files

phy: airoha: Fix REG_CSR_2L_JCPLL_SDM_HREN config in airoha_pcie_phy_init_ssc_jcpll() 



Fix typo configuring REG_CSR_2L_JCPLL_SDM_HREN register in
airoha_pcie_phy_init_ssc_jcpll routine.

Fixes: d7d2818b ("phy: airoha: Add PCIe PHY driver for EN7581 SoC.")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20240918-airoha-en7581-phy-fixes-v1-3-8291729a87f8@kernel.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent f9c5d636

drivers/phy/phy-airoha-pcie.c

+1 −1
Original line number Diff line number Diff line
@@ -802,7 +802,7 @@ static void airoha_pcie_phy_init_ssc_jcpll(struct airoha_pcie_phy *pcie_phy) 
	airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_IFM,

				   CSR_2L_PXP_JCPLL_SDM_IFM);

	airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SDM_HREN,

				   REG_CSR_2L_JCPLL_SDM_HREN);

				   CSR_2L_PXP_JCPLL_SDM_HREN);

	airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_JCPLL_RST_DLY,

				     CSR_2L_PXP_JCPLL_SDM_DI_EN);

	airoha_phy_csr_2l_set_bits(pcie_phy, REG_CSR_2L_JCPLL_SSC,