Commit 70684dcb authored by Shivasharan S's avatar Shivasharan S Committed by Martin K. Petersen
Browse files

scsi: mpt3sas: Update MPI headers to 02.00.62 version 



Updated MPI header files to version 02.00.62.

Signed-off-by: default avatarShivasharan S <shivasharan.srikanteshwara@broadcom.com>
Link: https://lore.kernel.org/r/1739410016-27503-2-git-send-email-shivasharan.srikanteshwara@broadcom.com


Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 2014c95a

drivers/scsi/mpt3sas/mpi/mpi2.h

+8 −1
Original line number Diff line number Diff line
@@ -125,6 +125,12 @@ 
 * 06-24-19  02.00.55  Bumped MPI2_HEADER_VERSION_UNIT

 * 08-01-19  02.00.56  Bumped MPI2_HEADER_VERSION_UNIT

 * 10-02-19  02.00.57  Bumped MPI2_HEADER_VERSION_UNIT

 * 07-20-20  02.00.58  Bumped MPI2_HEADER_VERSION_UNIT

 * 03-30-21  02.00.59  Bumped MPI2_HEADER_VERSION_UNIT

 * 06-03-22  02.00.60  Bumped MPI2_HEADER_VERSION_UNIT

 * 09-20-23  02.00.61  Bumped MPI2_HEADER_VERSION_UNIT

 * 09-13-24  02.00.62  Bumped MPI2_HEADER_VERSION_UNIT

 *                     Added MPI2_FUNCTION_MCTP_PASSTHROUGH

 *  --------------------------------------------------------------------------

 */
@@ -165,7 +171,7 @@ 




/* Unit and Dev versioning for this MPI header set */

#define MPI2_HEADER_VERSION_UNIT            (0x39)

#define MPI2_HEADER_VERSION_UNIT            (0x3E)

#define MPI2_HEADER_VERSION_DEV             (0x00)

#define MPI2_HEADER_VERSION_UNIT_MASK       (0xFF00)

#define MPI2_HEADER_VERSION_UNIT_SHIFT      (8)
@@ -669,6 +675,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION { 
#define MPI2_FUNCTION_PWR_MGMT_CONTROL              (0x30)

#define MPI2_FUNCTION_SEND_HOST_MESSAGE             (0x31)

#define MPI2_FUNCTION_NVME_ENCAPSULATED             (0x33)

#define MPI2_FUNCTION_MCTP_PASSTHROUGH              (0x34)

#define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC          (0xF0)

#define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC          (0xFF)

drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h

+5 −0
Original line number Diff line number Diff line
@@ -251,6 +251,7 @@ 
 * 12-17-18  02.00.47  Swap locations of Slotx2 and Slotx4 in ManPage 7.

 * 08-01-19  02.00.49  Add MPI26_MANPAGE7_FLAG_X2_X4_SLOT_INFO_VALID

 *                     Add MPI26_IOUNITPAGE1_NVME_WRCACHE_SHIFT

 * 09-13-24  02.00.50  Added PCIe 32 GT/s link rate

 */



#ifndef MPI2_CNFG_H
@@ -1121,6 +1122,7 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 { 
#define MPI2_IOUNITPAGE7_PCIE_SPEED_5_0_GBPS        (0x01)

#define MPI2_IOUNITPAGE7_PCIE_SPEED_8_0_GBPS        (0x02)

#define MPI2_IOUNITPAGE7_PCIE_SPEED_16_0_GBPS       (0x03)

#define MPI2_IOUNITPAGE7_PCIE_SPEED_32_0_GBPS       (0x04)



/*defines for IO Unit Page 7 ProcessorState field */

#define MPI2_IOUNITPAGE7_PSTATE_MASK_SECOND         (0x0000000F)
@@ -2301,6 +2303,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 { 
#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION                   (0x0001)



/*values for SAS IO Unit Page 1 AdditionalControlFlags */

#define MPI2_SASIOUNIT1_ACONTROL_PROD_SPECIFIC_1                    (0x8000)

#define MPI2_SASIOUNIT1_ACONTROL_DA_PERSIST_CONNECT                 (0x0100)

#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL          (0x0080)

#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION    (0x0040)
@@ -3591,6 +3594,7 @@ typedef struct _MPI2_CONFIG_PAGE_EXT_MAN_PS { 
#define MPI26_PCIE_NEG_LINK_RATE_5_0                    (0x03)

#define MPI26_PCIE_NEG_LINK_RATE_8_0                    (0x04)

#define MPI26_PCIE_NEG_LINK_RATE_16_0                   (0x05)

#define MPI26_PCIE_NEG_LINK_RATE_32_0                   (0x06)





/****************************************************************************
@@ -3700,6 +3704,7 @@ typedef struct _MPI26_CONFIG_PAGE_PIOUNIT_1 { 
#define MPI26_PCIEIOUNIT1_MAX_RATE_5_0                              (0x30)

#define MPI26_PCIEIOUNIT1_MAX_RATE_8_0                              (0x40)

#define MPI26_PCIEIOUNIT1_MAX_RATE_16_0                             (0x50)

#define MPI26_PCIEIOUNIT1_MAX_RATE_32_0                             (0x60)



/*values for PCIe IO Unit Page 1 DMDReportPCIe */

#define MPI26_PCIEIOUNIT1_DMDRPT_UNIT_MASK                          (0x80)

drivers/scsi/mpt3sas/mpi/mpi2_ioc.h

+54 −0
Original line number Diff line number Diff line
@@ -179,6 +179,7 @@ 
 *                     Added MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED

 *                     Added MPI2_FW_DOWNLOAD_ITYPE_COREDUMP

 *                     Added MPI2_FW_UPLOAD_ITYPE_COREDUMP

 * 9-13-24    02.00.39 Added MPI26_MCTP_PASSTHROUGH messages

 * --------------------------------------------------------------------------

 */
@@ -382,6 +383,7 @@ typedef struct _MPI2_IOC_FACTS_REPLY { 
/*ProductID field uses MPI2_FW_HEADER_PID_ */



/*IOCCapabilities */

#define MPI26_IOCFACTS_CAPABILITY_MCTP_PASSTHRU         (0x00800000)

#define MPI26_IOCFACTS_CAPABILITY_COREDUMP_ENABLED      (0x00200000)

#define MPI26_IOCFACTS_CAPABILITY_PCIE_SRIOV            (0x00100000)

#define MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ            (0x00080000)
@@ -1798,5 +1800,57 @@ typedef struct _MPI26_IOUNIT_CONTROL_REPLY { 
	Mpi26IoUnitControlReply_t,

	*pMpi26IoUnitControlReply_t;



/****************************************************************************

 *  MCTP Passthrough messages (MPI v2.6 and later only.)

 ****************************************************************************/



/* MCTP Passthrough Request Message */

typedef struct _MPI26_MCTP_PASSTHROUGH_REQUEST {

	U8                      MsgContext;         /* 0x00 */

	U8                      Reserved1[2];       /* 0x01 */

	U8                      Function;           /* 0x03 */

	U8                      Reserved2[3];       /* 0x04 */

	U8                      MsgFlags;           /* 0x07 */

	U8                      VP_ID;              /* 0x08 */

	U8                      VF_ID;              /* 0x09 */

	U16                     Reserved3;          /* 0x0A */

	U32                     Reserved4;          /* 0x0C */

	U8                      Flags;              /* 0x10 */

	U8                      Reserved5[3];       /* 0x11 */

	U32                     Reserved6;          /* 0x14 */

	U32                     H2DLength;          /* 0x18 */

	U32                     D2HLength;          /* 0x1C */

	MPI25_SGE_IO_UNION      H2DSGL;             /* 0x20 */

	MPI25_SGE_IO_UNION      D2HSGL;             /* 0x30 */

} MPI26_MCTP_PASSTHROUGH_REQUEST,

	*PTR_MPI26_MCTP_PASSTHROUGH_REQUEST,

	Mpi26MctpPassthroughRequest_t,

	*pMpi26MctpPassthroughRequest_t;



/* values for the MsgContext field */

#define MPI26_MCTP_MSG_CONEXT_UNUSED            (0x00)



/* values for the Flags field */

#define MPI26_MCTP_FLAGS_MSG_FORMAT_MPT         (0x01)



/* MCTP Passthrough Reply Message */

typedef struct _MPI26_MCTP_PASSTHROUGH_REPLY {

	U8                      MsgContext;         /* 0x00 */

	U8                      Reserved1;          /* 0x01 */

	U8                      MsgLength;          /* 0x02 */

	U8                      Function;           /* 0x03 */

	U8                      Reserved2[3];       /* 0x04 */

	U8                      MsgFlags;           /* 0x07 */

	U8                      VP_ID;              /* 0x08 */

	U8                      VF_ID;              /* 0x09 */

	U16                     Reserved3;          /* 0x0A */

	U16                     Reserved4;          /* 0x0C */

	U16                     IOCStatus;          /* 0x0E */

	U32                     IOCLogInfo;         /* 0x10 */

	U32                     ResponseDataLength; /* 0x14 */

} MPI26_MCTP_PASSTHROUGH_REPLY,

	*PTR_MPI26_MCTP_PASSTHROUGH_REPLY,

	Mpi26MctpPassthroughReply_t,

	*pMpi26MctpPassthroughReply_t;



#endif