Unverified Commit 706fd00d authored by Takahiro Kuwano's avatar Takahiro Kuwano Committed by Tudor Ambarus
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mtd: spi-nor: Extract volatile register offset from SCCR map 



In use of multi-chip devices, we need to access registers in each die for
configuration and status check. The number of dice in the device and
volatile register offsets for each die are essential to iterate register
access ops.

The volatile register offset for the first die resides in the 1st DWORD
of SCCR map. Allocate the table and copy the offset value.

The table may be allocated when the SCCR map for multi-chip is parsed.
Since we cannot assume SCCR parse is always in ahead of SCCR multi-chip,
we need to check if the table is already allocated or not.

Signed-off-by: default avatarTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/e2cc39ad6e0e02dd8288c4def9bb201a3f564425.1680849425.git.Takahiro.Kuwano@infineon.com


Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@linaro.org>
parent e570f787

drivers/mtd/spi-nor/core.h

+4 −0
Original line number Diff line number Diff line
@@ -352,6 +352,8 @@ struct spi_nor_otp { 
 *			in octal DTR mode.

 * @rdsr_addr_nbytes:	dummy address bytes needed for Read Status Register

 *			command in octal DTR mode.

 * @n_dice:		number of dice in the flash memory.

 * @vreg_offset:	volatile register offset for each die.

 * @hwcaps:		describes the read and page program hardware

 *			capabilities.

 * @reads:		read capabilities ordered by priority: the higher index
@@ -385,6 +387,8 @@ struct spi_nor_flash_parameter { 
	u8				addr_mode_nbytes;

	u8				rdsr_dummy;

	u8				rdsr_addr_nbytes;

	u8				n_dice;

	u32				*vreg_offset;



	struct spi_nor_hwcaps		hwcaps;

	struct spi_nor_read_command	reads[SNOR_CMD_READ_MAX];

drivers/mtd/spi-nor/sfdp.c

+13 −0
Original line number Diff line number Diff line
@@ -1226,6 +1226,7 @@ static int spi_nor_parse_profile1(struct spi_nor *nor, 
static int spi_nor_parse_sccr(struct spi_nor *nor,

			      const struct sfdp_parameter_header *sccr_header)

{

	struct spi_nor_flash_parameter *params = nor->params;

	u32 *dwords, addr;

	size_t len;

	int ret;
@@ -1242,6 +1243,18 @@ static int spi_nor_parse_sccr(struct spi_nor *nor, 


	le32_to_cpu_array(dwords, sccr_header->length);



	/* Address offset for volatile registers (die 0) */

	if (!params->vreg_offset) {

		params->vreg_offset = devm_kmalloc(nor->dev, sizeof(*dwords),

						   GFP_KERNEL);

		if (!params->vreg_offset) {

			ret = -ENOMEM;

			goto out;

		}

	}

	params->vreg_offset[0] = dwords[SFDP_DWORD(1)];

	params->n_dice = 1;



	if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,

		      dwords[SFDP_DWORD(22)]))

		nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;