Commit 70a0d499 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Greg Kroah-Hartman
Browse files

serial: 8250_dw: Use devm_clk_get_optional_enabled() 



Use devm_clk_get_optional_enabled() to simplify the code.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230919195513.3197930-1-andriy.shevchenko@linux.intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent aef6b863

drivers/tty/serial/8250/8250_dw.c

+3 −24
Original line number Diff line number Diff line
@@ -498,11 +498,6 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) 
	}

}



static void dw8250_clk_disable_unprepare(void *data)

{

	clk_disable_unprepare(data);

}



static void dw8250_reset_control_assert(void *data)

{

	reset_control_assert(data);
@@ -598,23 +593,15 @@ static int dw8250_probe(struct platform_device *pdev) 
	device_property_read_u32(dev, "clock-frequency", &p->uartclk);



	/* If there is separate baudclk, get the rate from it. */

	data->clk = devm_clk_get_optional(dev, "baudclk");

	data->clk = devm_clk_get_optional_enabled(dev, "baudclk");

	if (data->clk == NULL)

		data->clk = devm_clk_get_optional(dev, NULL);

		data->clk = devm_clk_get_optional_enabled(dev, NULL);

	if (IS_ERR(data->clk))

		return PTR_ERR(data->clk);



	INIT_WORK(&data->clk_work, dw8250_clk_work_cb);

	data->clk_notifier.notifier_call = dw8250_clk_notifier_cb;



	err = clk_prepare_enable(data->clk);

	if (err)

		return dev_err_probe(dev, err, "could not enable optional baudclk\n");



	err = devm_add_action_or_reset(dev, dw8250_clk_disable_unprepare, data->clk);

	if (err)

		return err;



	if (data->clk)

		p->uartclk = clk_get_rate(data->clk);
@@ -622,18 +609,10 @@ static int dw8250_probe(struct platform_device *pdev) 
	if (!p->uartclk)

		return dev_err_probe(dev, -EINVAL, "clock rate not defined\n");



	data->pclk = devm_clk_get_optional(dev, "apb_pclk");

	data->pclk = devm_clk_get_optional_enabled(dev, "apb_pclk");

	if (IS_ERR(data->pclk))

		return PTR_ERR(data->pclk);



	err = clk_prepare_enable(data->pclk);

	if (err)

		return dev_err_probe(dev, err, "could not enable apb_pclk\n");



	err = devm_add_action_or_reset(dev, dw8250_clk_disable_unprepare, data->pclk);

	if (err)

		return err;



	data->rst = devm_reset_control_get_optional_exclusive(dev, NULL);

	if (IS_ERR(data->rst))

		return PTR_ERR(data->rst);