Unverified Commit 716d0a0a authored by Chin-Ting Kuo's avatar Chin-Ting Kuo Committed by Mark Brown
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spi: aspeed: Enable Quad SPI mode for page program 



Ensure the controller switches to quad I/O mode when
spi-tx-bus-width dts property is 4 and the Quad SPI program
opcode (32h or 34h) is used. Without this change, high-bit
data will be lost during page programming.

Signed-off-by: default avatarChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Link: https://patch.msgid.link/20251114101042.1520997-3-chin-ting_kuo@aspeedtech.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c94f1347

drivers/spi/spi-aspeed-smc.c

+4 −0
Original line number Diff line number Diff line
@@ -263,11 +263,15 @@ static ssize_t aspeed_spi_write_user(struct aspeed_spi_chip *chip, 
				     const struct spi_mem_op *op)

{

	int ret;

	int io_mode = aspeed_spi_get_io_mode(op);



	aspeed_spi_start_user(chip);

	ret = aspeed_spi_send_cmd_addr(chip, op->addr.nbytes, op->addr.val, op->cmd.opcode);

	if (ret < 0)

		goto stop_user;



	aspeed_spi_set_io_mode(chip, io_mode);



	aspeed_spi_write_to_ahb(chip->ahb_base, op->data.buf.out, op->data.nbytes);

stop_user:

	aspeed_spi_stop_user(chip);