Commit 746ae23a authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Bjorn Andersson
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arm64: dts: qcom: sm8550: Fix UFS PHY clocks 



QMP PHY used in SM8550 requires 3 clocks:

* ref - 19.2MHz reference clock from RPMh
* ref_aux - Auxiliary reference clock from GCC
* qref - QREF clock from TCSR

Fixes: 35cf1aaa ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
Reviewed-by: default avatarCan Guo <quic_cang@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-16-58a49d2f4605@linaro.org


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 8edbdefe

arch/arm64/boot/dts/qcom/sm8550.dtsi

+6 −3
Original line number Diff line number Diff line
@@ -1933,9 +1933,12 @@ crypto: crypto@1dfa000 { 
		ufs_mem_phy: phy@1d80000 {

			compatible = "qcom,sm8550-qmp-ufs-phy";

			reg = <0x0 0x01d80000 0x0 0x2000>;

			clocks = <&tcsr TCSR_UFS_CLKREF_EN>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;

			clock-names = "ref", "ref_aux";

			clocks = <&rpmhcc RPMH_CXO_CLK>,

				 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,

				 <&tcsr TCSR_UFS_CLKREF_EN>;

			clock-names = "ref",

				      "ref_aux",

				      "qref";



			power-domains = <&gcc UFS_MEM_PHY_GDSC>;