Commit 755350bc authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Daniel Lezcano
Browse files

clocksource/drivers/arm_global_timer: Simplify prescaler register access 



Use GENMASK() to define the prescaler mask and make the whole driver use
the mask (together with helpers such as FIELD_{GET,PREP,FIT}) instead of
needing an additional shift and max value constant.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240225151336.2728533-4-martin.blumenstingl@googlemail.com
parent e651f2fa

drivers/clocksource/arm_global_timer.c

+8 −11
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 


#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/bitfield.h>

#include <linux/clocksource.h>

#include <linux/clockchips.h>

#include <linux/cpu.h>
@@ -31,10 +32,7 @@ 
#define GT_CONTROL_COMP_ENABLE		BIT(1)	/* banked */

#define GT_CONTROL_IRQ_ENABLE		BIT(2)	/* banked */

#define GT_CONTROL_AUTO_INC		BIT(3)	/* banked */

#define GT_CONTROL_PRESCALER_SHIFT      8

#define GT_CONTROL_PRESCALER_MAX        0xFF

#define GT_CONTROL_PRESCALER_MASK       (GT_CONTROL_PRESCALER_MAX << \

					 GT_CONTROL_PRESCALER_SHIFT)

#define GT_CONTROL_PRESCALER_MASK	GENMASK(15, 8)



#define GT_INT_STATUS	0x0c

#define GT_INT_STATUS_EVENT_FLAG	BIT(0)
@@ -248,7 +246,7 @@ static void gt_write_presc(u32 psv) 


	reg = readl(gt_base + GT_CONTROL);

	reg &= ~GT_CONTROL_PRESCALER_MASK;

	reg |= psv << GT_CONTROL_PRESCALER_SHIFT;

	reg |= FIELD_PREP(GT_CONTROL_PRESCALER_MASK, psv);

	writel(reg, gt_base + GT_CONTROL);

}
@@ -257,8 +255,7 @@ static u32 gt_read_presc(void) 
	u32 reg;



	reg = readl(gt_base + GT_CONTROL);

	reg &= GT_CONTROL_PRESCALER_MASK;

	return reg >> GT_CONTROL_PRESCALER_SHIFT;

	return FIELD_GET(GT_CONTROL_PRESCALER_MASK, reg);

}



static void __init gt_delay_timer_init(void)
@@ -273,9 +270,9 @@ static int __init gt_clocksource_init(void) 
	writel(0, gt_base + GT_COUNTER0);

	writel(0, gt_base + GT_COUNTER1);

	/* set prescaler and enable timer on all the cores */

	writel(((CONFIG_ARM_GT_INITIAL_PRESCALER_VAL - 1) <<

		GT_CONTROL_PRESCALER_SHIFT)

	       | GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);

	writel(FIELD_PREP(GT_CONTROL_PRESCALER_MASK,

			  CONFIG_ARM_GT_INITIAL_PRESCALER_VAL - 1) |

	       GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);



#ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK

	sched_clock_register(gt_sched_clock_read, 64, gt_target_rate);
@@ -301,7 +298,7 @@ static int gt_clk_rate_change_cb(struct notifier_block *nb, 
		psv--;



		/* prescaler within legal range? */

		if (psv > GT_CONTROL_PRESCALER_MAX)

		if (!FIELD_FIT(GT_CONTROL_PRESCALER_MASK, psv))

			return NOTIFY_BAD;



		/*