Commit 7771f41d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'juno-fix-6.15' of... 

Merge tag 'juno-fix-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

Armv8 Morello fix for v6.15

Just a single fix addressing the cache node inconsistencies. It removed
unnecessary CPU number from L2 cache node names since they are local to
CPU nodes and should simply be named "l2-cache" and relocates the shared
L3 cache node from under cpu@0/l2-cache to the /cpus node, which is the
standard location for shared caches.

* tag 'juno-fix-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: morello: Fix-up cache nodes
parents fbefe1c4 0c562281

arch/arm64/boot/dts/arm/morello.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ cpu0: cpu@0 { 
			next-level-cache = <&l2_0>;

			clocks = <&scmi_dvfs 0>;



			l2_0: l2-cache-0 {

			l2_0: l2-cache {

				compatible = "cache";

				cache-level = <2>;

				/* 8 ways set associative */
@@ -53,13 +53,6 @@ l2_0: l2-cache-0 { 
				cache-sets = <2048>;

				cache-unified;

				next-level-cache = <&l3_0>;



				l3_0: l3-cache {

					compatible = "cache";

					cache-level = <3>;

					cache-size = <0x100000>;

					cache-unified;

				};

			};

		};
@@ -78,7 +71,7 @@ cpu1: cpu@100 { 
			next-level-cache = <&l2_1>;

			clocks = <&scmi_dvfs 0>;



			l2_1: l2-cache-1 {

			l2_1: l2-cache {

				compatible = "cache";

				cache-level = <2>;

				/* 8 ways set associative */
@@ -105,7 +98,7 @@ cpu2: cpu@10000 { 
			next-level-cache = <&l2_2>;

			clocks = <&scmi_dvfs 1>;



			l2_2: l2-cache-2 {

			l2_2: l2-cache {

				compatible = "cache";

				cache-level = <2>;

				/* 8 ways set associative */
@@ -132,7 +125,7 @@ cpu3: cpu@10100 { 
			next-level-cache = <&l2_3>;

			clocks = <&scmi_dvfs 1>;



			l2_3: l2-cache-3 {

			l2_3: l2-cache {

				compatible = "cache";

				cache-level = <2>;

				/* 8 ways set associative */
@@ -143,6 +136,13 @@ l2_3: l2-cache-3 { 
				next-level-cache = <&l3_0>;

			};

		};



		l3_0: l3-cache {

			compatible = "cache";

			cache-level = <3>;

			cache-size = <0x100000>;

			cache-unified;

		};

	};



	firmware {