Commit 77e8aad5 authored by Kuogee Hsieh's avatar Kuogee Hsieh Committed by Abhinav Kumar
Browse files

drm/msms/dp: fixed link clock divider bits be over written in BPC unknown case 



Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
BPC unknown case, the additional shift causes spill over to the other
bits of the [DP_CONFIGURATION_CTRL] register.
Fix this by changing the return value of dp_link_get_test_bits_depth()
in the BPC unknown case to (DP_TEST_BIT_DEPTH_8 >> DP_TEST_BIT_DEPTH_SHIFT).

Fixes: c943b494 ("drm/msm/dp: add displayPort driver support")
Signed-off-by: default avatarKuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/573989/
Link: https://lore.kernel.org/r/1704917931-30133-1-git-send-email-quic_khsieh@quicinc.com


[quic_abhinavk@quicinc.com: fix minor checkpatch warning to align with opening braces]
Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
parent 1793ce9f

drivers/gpu/drm/msm/dp/dp_ctrl.c

+0 −5
Original line number Diff line number Diff line
@@ -135,11 +135,6 @@ static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl) 
	tbd = dp_link_get_test_bits_depth(ctrl->link,

			ctrl->panel->dp_mode.bpp);



	if (tbd == DP_TEST_BIT_DEPTH_UNKNOWN) {

		pr_debug("BIT_DEPTH not set. Configure default\n");

		tbd = DP_TEST_BIT_DEPTH_8;

	}



	config |= tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT;



	/* Num of Lanes */

drivers/gpu/drm/msm/dp/dp_link.c

+7 −3
Original line number Diff line number Diff line
@@ -1179,6 +1179,9 @@ void dp_link_reset_phy_params_vx_px(struct dp_link *dp_link) 
u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp)

{

	u32 tbd;

	struct dp_link_private *link;



	link = container_of(dp_link, struct dp_link_private, dp_link);



	/*

	 * Few simplistic rules and assumptions made here:
@@ -1196,11 +1199,12 @@ u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp) 
		tbd = DP_TEST_BIT_DEPTH_10;

		break;

	default:

		tbd = DP_TEST_BIT_DEPTH_UNKNOWN;

		drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use bpc=8\n",

			   bpp);

		tbd = DP_TEST_BIT_DEPTH_8;

		break;

	}



	if (tbd != DP_TEST_BIT_DEPTH_UNKNOWN)

	tbd = (tbd >> DP_TEST_BIT_DEPTH_SHIFT);



	return tbd;