Commit 78871b6c authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: enable ras error count query and reset for HDP 



add hdp block ras error query and reset support in
amdgpu ras error count query and reset interface

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarJohn Clements <John.Clements@amd.com>
Reviewed-by: default avatarDennis Li <Dennis.Li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7c63694e

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

+10 −0
Original line number Diff line number Diff line
@@ -890,6 +890,11 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev, 
		    adev->gmc.xgmi.ras_funcs->query_ras_error_count)

			adev->gmc.xgmi.ras_funcs->query_ras_error_count(adev, &err_data);

		break;

	case AMDGPU_RAS_BLOCK__HDP:

		if (adev->hdp.ras_funcs &&

		    adev->hdp.ras_funcs->query_ras_error_count)

			adev->hdp.ras_funcs->query_ras_error_count(adev, &err_data);

		break;

	default:

		break;

	}
@@ -967,6 +972,11 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device *adev, 
		if (adev->sdma.funcs->reset_ras_error_count)

			adev->sdma.funcs->reset_ras_error_count(adev);

		break;

	case AMDGPU_RAS_BLOCK__HDP:

		if (adev->hdp.ras_funcs &&

		    adev->hdp.ras_funcs->reset_ras_error_count)

			adev->hdp.ras_funcs->reset_ras_error_count(adev);

		break;

	default:

		break;

	}

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+4 −0
Original line number Diff line number Diff line
@@ -1272,6 +1272,10 @@ static int gmc_v9_0_late_init(void *handle) 
	    adev->mmhub.ras_funcs->reset_ras_error_count)

		adev->mmhub.ras_funcs->reset_ras_error_count(adev);



	if (adev->hdp.ras_funcs &&

	    adev->hdp.ras_funcs->reset_ras_error_count)

		adev->hdp.ras_funcs->reset_ras_error_count(adev);



	r = amdgpu_gmc_ras_late_init(adev);

	if (r)

		return r;

drivers/gpu/drm/amd/amdgpu/soc15.c

+0 −3
Original line number Diff line number Diff line
@@ -1521,9 +1521,6 @@ static int soc15_common_late_init(void *handle) 
	if (amdgpu_sriov_vf(adev))

		xgpu_ai_mailbox_get_irq(adev);



	if (adev->hdp.funcs->reset_ras_error_count)

		adev->hdp.funcs->reset_ras_error_count(adev);



	if (adev->nbio.ras_funcs &&

	    adev->nbio.ras_funcs->ras_late_init)

		r = adev->nbio.ras_funcs->ras_late_init(adev);