Commit 78f237a6 authored by Chaitanya Kumar Borah's avatar Chaitanya Kumar Borah Committed by Animesh Manna
Browse files

drm/i915/dsb: Add support for GOSUB interrupt 



DSB raises an interrupt when there is a nested GOSUB command or
illegal Head/Tail. Add support to log such errors in the DSB
interrupt handler.

v2: Enable support only in platforms that support this (Ville)

Signed-off-by: default avatarChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarAnimesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-7-chaitanya.kumar.borah@intel.com
parent 796b6df0

drivers/gpu/drm/i915/display/intel_dsb.c

+9 −0
Original line number Diff line number Diff line
@@ -655,6 +655,9 @@ static u32 dsb_error_int_status(struct intel_display *display) 
	if (DISPLAY_VER(display) >= 14)

		errors |= DSB_ATS_FAULT_INT_STATUS;



	if (DISPLAY_VER(display) >= 30)

		errors |= DSB_GOSUB_INT_STATUS;



	return errors;

}
@@ -669,6 +672,9 @@ static u32 dsb_error_int_en(struct intel_display *display) 
	if (DISPLAY_VER(display) >= 14)

		errors |= DSB_ATS_FAULT_INT_EN;



	if (DISPLAY_VER(display) >= 30)

		errors |= DSB_GOSUB_INT_EN;



	return errors;

}
@@ -1007,4 +1013,7 @@ void intel_dsb_irq_handler(struct intel_display *display, 
	if (errors & DSB_POLL_ERR_INT_STATUS)

		drm_err(display->drm, "[CRTC:%d:%s] DSB %d poll error\n",

			crtc->base.base.id, crtc->base.name, dsb_id);

	if (errors & DSB_GOSUB_INT_STATUS)

		drm_err(display->drm, "[CRTC:%d:%s] DSB %d GOSUB programming error\n",

			crtc->base.base.id, crtc->base.name, dsb_id);

}

drivers/gpu/drm/i915/display/intel_dsb_regs.h

+2 −0
Original line number Diff line number Diff line
@@ -51,11 +51,13 @@ 
#define   DSB_RESET_SM_STATE_MASK	REG_GENMASK(5, 4)

#define   DSB_RUN_SM_STATE_MASK		REG_GENMASK(2, 0)

#define DSB_INTERRUPT(pipe, id)		_MMIO(DSBSL_INSTANCE(pipe, id) + 0x28)

#define   DSB_GOSUB_INT_EN		REG_BIT(21) /* ptl+ */

#define   DSB_ATS_FAULT_INT_EN		REG_BIT(20) /* mtl+ */

#define   DSB_GTT_FAULT_INT_EN		REG_BIT(19)

#define   DSB_RSPTIMEOUT_INT_EN		REG_BIT(18)

#define   DSB_POLL_ERR_INT_EN		REG_BIT(17)

#define   DSB_PROG_INT_EN		REG_BIT(16)

#define   DSB_GOSUB_INT_STATUS		REG_BIT(5) /* ptl+ */

#define   DSB_ATS_FAULT_INT_STATUS	REG_BIT(4) /* mtl+ */

#define   DSB_GTT_FAULT_INT_STATUS	REG_BIT(3)

#define   DSB_RSPTIMEOUT_INT_STATUS	REG_BIT(2)