Commit 7946340f authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: Move csa related code to separate file 



In baremetal, also need to reserve csa for preemption.
so move the csa related code out of sriov.

Reviewed-by: default avatarMonk Liu <Monk.Liu@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1e256e27

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \

	amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \

	amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \

	amdgpu_gmc.o amdgpu_xgmi.o

	amdgpu_gmc.o amdgpu_xgmi.o amdgpu_csa.o



# add asic specific block

amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ 
#include "amdgpu_sdma.h"

#include "amdgpu_dm.h"

#include "amdgpu_virt.h"

#include "amdgpu_csa.h"

#include "amdgpu_gart.h"

#include "amdgpu_debugfs.h"

#include "amdgpu_job.h"

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c

0 → 100644
+117 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2016 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.



 * * Author: Monk.liu@amd.com

 */



#include "amdgpu.h"



uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)

{

	uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;



	addr -= AMDGPU_VA_RESERVED_SIZE;

	addr = amdgpu_gmc_sign_extend(addr);



	return addr;

}



int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,

				u32 domain, uint32_t size)

{

	int r;

	void *ptr;



	r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,

				domain, bo,

				NULL, &ptr);

	if (!bo)

		return -ENOMEM;



	memset(ptr, 0, size);

	return 0;

}



void amdgpu_free_static_csa(struct amdgpu_bo **bo)

{

	amdgpu_bo_free_kernel(bo, NULL, NULL);

}



/*

 * amdgpu_map_static_csa should be called during amdgpu_vm_init

 * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command

 * submission of GFX should use this virtual address within META_DATA init

 * package to support SRIOV gfx preemption.

 */

int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,

			  struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,

			  uint64_t csa_addr, uint32_t size)

{

	struct ww_acquire_ctx ticket;

	struct list_head list;

	struct amdgpu_bo_list_entry pd;

	struct ttm_validate_buffer csa_tv;

	int r;



	INIT_LIST_HEAD(&list);

	INIT_LIST_HEAD(&csa_tv.head);

	csa_tv.bo = &bo->tbo;

	csa_tv.shared = true;



	list_add(&csa_tv.head, &list);

	amdgpu_vm_get_pd_bo(vm, &list, &pd);



	r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);

	if (r) {

		DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);

		return r;

	}



	*bo_va = amdgpu_vm_bo_add(adev, vm, bo);

	if (!*bo_va) {

		ttm_eu_backoff_reservation(&ticket, &list);

		DRM_ERROR("failed to create bo_va for static CSA\n");

		return -ENOMEM;

	}



	r = amdgpu_vm_alloc_pts(adev, (*bo_va)->base.vm, csa_addr,

				size);

	if (r) {

		DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r);

		amdgpu_vm_bo_rmv(adev, *bo_va);

		ttm_eu_backoff_reservation(&ticket, &list);

		return r;

	}



	r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,

			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |

			     AMDGPU_PTE_EXECUTABLE);



	if (r) {

		DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);

		amdgpu_vm_bo_rmv(adev, *bo_va);

		ttm_eu_backoff_reservation(&ticket, &list);

		return r;

	}



	ttm_eu_backoff_reservation(&ticket, &list);

	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.h

0 → 100644
+39 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2016 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Author: Monk.liu@amd.com

 */



#ifndef AMDGPU_CSA_MANAGER_H

#define AMDGPU_CSA_MANAGER_H



#define AMDGPU_CSA_SIZE		(8 * 1024)



uint32_t amdgpu_get_total_csa_size(struct amdgpu_device *adev);

uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev);

int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,

				u32 domain, uint32_t size);

int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,

			  struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,

			  uint64_t csa_addr, uint32_t size);

void amdgpu_free_static_csa(struct amdgpu_bo **bo);



#endif

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

+0 −92
Original line number Diff line number Diff line
@@ -23,16 +23,6 @@ 


#include "amdgpu.h"



uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)

{

	uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;



	addr -= AMDGPU_VA_RESERVED_SIZE;

	addr = amdgpu_gmc_sign_extend(addr);



	return addr;

}



bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev)

{

	/* By now all MMIO pages except mailbox are blocked */
@@ -41,88 +31,6 @@ bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev) 
	return RREG32_NO_KIQ(0xc040) == 0xffffffff;

}



int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,

				u32 domain, uint32_t size)

{

	int r;

	void *ptr;



	r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,

				domain, bo,

				NULL, &ptr);

	if (!bo)

		return -ENOMEM;



	memset(ptr, 0, size);

	return 0;

}



void amdgpu_free_static_csa(struct amdgpu_bo **bo)

{

	amdgpu_bo_free_kernel(bo, NULL, NULL);

}



/*

 * amdgpu_map_static_csa should be called during amdgpu_vm_init

 * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command

 * submission of GFX should use this virtual address within META_DATA init

 * package to support SRIOV gfx preemption.

 */

int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,

			  struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,

			  uint64_t csa_addr,  uint32_t size)

{

	struct ww_acquire_ctx ticket;

	struct list_head list;

	struct amdgpu_bo_list_entry pd;

	struct ttm_validate_buffer csa_tv;

	int r;



	INIT_LIST_HEAD(&list);

	INIT_LIST_HEAD(&csa_tv.head);

	csa_tv.bo = &bo->tbo;

	csa_tv.shared = true;



	list_add(&csa_tv.head, &list);

	amdgpu_vm_get_pd_bo(vm, &list, &pd);



	r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);

	if (r) {

		DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);

		return r;

	}



	*bo_va = amdgpu_vm_bo_add(adev, vm, bo);

	if (!*bo_va) {

		ttm_eu_backoff_reservation(&ticket, &list);

		DRM_ERROR("failed to create bo_va for static CSA\n");

		return -ENOMEM;

	}



	r = amdgpu_vm_alloc_pts(adev, (*bo_va)->base.vm, csa_addr,

				size);

	if (r) {

		DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r);

		amdgpu_vm_bo_rmv(adev, *bo_va);

		ttm_eu_backoff_reservation(&ticket, &list);

		return r;

	}



	r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,

			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |

			     AMDGPU_PTE_EXECUTABLE);



	if (r) {

		DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);

		amdgpu_vm_bo_rmv(adev, *bo_va);

		ttm_eu_backoff_reservation(&ticket, &list);

		return r;

	}



	ttm_eu_backoff_reservation(&ticket, &list);

	return 0;

}



void amdgpu_virt_init_setting(struct amdgpu_device *adev)

{

	/* enable virtual display */