Commit 794c68b2 authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
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x86/CPU/AMD: Get rid of amd_erratum_1485[]

parent b3ffbbd2
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+3 −8
Original line number Diff line number Diff line
@@ -59,10 +59,6 @@ static u32 nodes_per_socket = 1;
#define AMD_MODEL_RANGE_START(range)	(((range) >> 12) & 0xfff)
#define AMD_MODEL_RANGE_END(range)	((range) & 0xfff)

static const int amd_erratum_1485[] =
	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));

static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
{
	int osvw_id = *erratum++;
@@ -1093,6 +1089,9 @@ static void init_amd_zen3(struct cpuinfo_x86 *c)
static void init_amd_zen4(struct cpuinfo_x86 *c)
{
	init_amd_zen_common();

	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);
}

static void init_amd(struct cpuinfo_x86 *c)
@@ -1216,10 +1215,6 @@ static void init_amd(struct cpuinfo_x86 *c)
	    cpu_has(c, X86_FEATURE_AUTOIBRS))
		WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));

	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
	     cpu_has_amd_erratum(c, amd_erratum_1485))
		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);

	/* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */
	clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE);
}