Commit 79e8447e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'phy-fix-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 

Pull generic phy driver fixes from Vinod Koul:

 - Qualcomm repeater override properties, qmp pcie bindings fix for
   clocks and initialization sequence for firmware power down case

 - Marvell comphy bindings clock and child node constraints

 - Tegra xusb device reference leaks fix

 - TI omap usb device ref leak on unbind and RGMII IS settings fix

* tag 'phy-fix-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: qcom: qmp-pcie: Fix PHY initialization when powered down by firmware
  phy: ti: gmii-sel: Always write the RGMII ID setting
  dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings
  phy: ti-pipe3: fix device leak at unbind
  phy: ti: omap-usb2: fix device leak at unbind
  phy: tegra: xusb: fix device and OF node leak at probe
  dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraints
  phy: qualcomm: phy-qcom-eusb2-repeater: fix override properties
parents 0676181a 6cb8c1f9

Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml

+21 −8
Original line number Diff line number Diff line
@@ -47,21 +47,19 @@ properties: 
    const: 0



  clocks:

    minItems: 1

    maxItems: 3

    description: Reference clocks for CP110; MG clock, MG Core clock, AXI clock



  clock-names:

    items:

      - const: mg_clk

      - const: mg_core_clk

      - const: axi_clk

    minItems: 1

    maxItems: 3



  marvell,system-controller:

    description: Phandle to the Marvell system controller (CP110 only)

    $ref: /schemas/types.yaml#/definitions/phandle



patternProperties:

  '^phy@[0-2]$':

  '^phy@[0-5]$':

    description: A COMPHY lane child node

    type: object

    additionalProperties: false
@@ -69,10 +67,14 @@ patternProperties: 
    properties:

      reg:

        description: COMPHY lane number

        maximum: 5



      '#phy-cells':

        const: 1



      connector:

        type: object



    required:

      - reg

      - '#phy-cells'
@@ -91,13 +93,24 @@ allOf: 


    then:

      properties:

        clocks: false

        clock-names: false

        clocks:

          maxItems: 1

        clock-names:

          const: xtal



      required:

        - reg-names



    else:

      properties:

        clocks:

          minItems: 3

        clock-names:

          items:

            - const: mg_clk

            - const: mg_core_clk

            - const: axi_clk



      required:

        - marvell,system-controller

Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml

+2 −2
Original line number Diff line number Diff line
@@ -176,6 +176,8 @@ allOf: 
        compatible:

          contains:

            enum:

              - qcom,sa8775p-qmp-gen4x2-pcie-phy

              - qcom,sa8775p-qmp-gen4x4-pcie-phy

              - qcom,sc8280xp-qmp-gen3x1-pcie-phy

              - qcom,sc8280xp-qmp-gen3x2-pcie-phy

              - qcom,sc8280xp-qmp-gen3x4-pcie-phy
@@ -197,8 +199,6 @@ allOf: 
          contains:

            enum:

              - qcom,qcs8300-qmp-gen4x2-pcie-phy

              - qcom,sa8775p-qmp-gen4x2-pcie-phy

              - qcom,sa8775p-qmp-gen4x4-pcie-phy

    then:

      properties:

        clocks:

drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c

+2 −2
Original line number Diff line number Diff line
@@ -127,13 +127,13 @@ static int eusb2_repeater_init(struct phy *phy) 
			     rptr->cfg->init_tbl[i].value);



	/* Override registers from devicetree values */

	if (!of_property_read_u8(np, "qcom,tune-usb2-amplitude", &val))

	if (!of_property_read_u8(np, "qcom,tune-usb2-preem", &val))

		regmap_write(regmap, base + EUSB2_TUNE_USB2_PREEM, val);



	if (!of_property_read_u8(np, "qcom,tune-usb2-disc-thres", &val))

		regmap_write(regmap, base + EUSB2_TUNE_HSDISC, val);



	if (!of_property_read_u8(np, "qcom,tune-usb2-preem", &val))

	if (!of_property_read_u8(np, "qcom,tune-usb2-amplitude", &val))

		regmap_write(regmap, base + EUSB2_TUNE_IUSB2, val);



	/* Wait for status OK */

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

+19 −6
Original line number Diff line number Diff line
@@ -3067,6 +3067,14 @@ struct qmp_pcie { 
	struct clk_fixed_rate aux_clk_fixed;

};



static bool qphy_checkbits(const void __iomem *base, u32 offset, u32 val)

{

	u32 reg;



	reg = readl(base + offset);

	return (reg & val) == val;

}



static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)

{

	u32 reg;
@@ -4339,16 +4347,21 @@ static int qmp_pcie_init(struct phy *phy) 
	struct qmp_pcie *qmp = phy_get_drvdata(phy);

	const struct qmp_phy_cfg *cfg = qmp->cfg;

	void __iomem *pcs = qmp->pcs;

	bool phy_initialized = !!(readl(pcs + cfg->regs[QPHY_START_CTRL]));

	int ret;



	qmp->skip_init = qmp->nocsr_reset && phy_initialized;

	/*

	 * We need to check the existence of init sequences in two cases:

	 * 1. The PHY doesn't support no_csr reset.

	 * 2. The PHY supports no_csr reset but isn't initialized by bootloader.

	 * As we can't skip init in these two cases.

	 * We can skip PHY initialization if all of the following conditions

	 * are met:

	 *  1. The PHY supports the nocsr_reset that preserves the PHY config.

	 *  2. The PHY was started (and not powered down again) by the

	 *     bootloader, with all of the expected bits set correctly.

	 * In this case, we can continue without having the init sequence

	 * defined in the driver.

	 */

	qmp->skip_init = qmp->nocsr_reset &&

		qphy_checkbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START) &&

		qphy_checkbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], cfg->pwrdn_ctrl);



	if (!qmp->skip_init && !cfg->tbls.serdes_num) {

		dev_err(qmp->dev, "Init sequence not available\n");

		return -ENODATA;

drivers/phy/tegra/xusb-tegra210.c

+5 −1
Original line number Diff line number Diff line
@@ -3164,18 +3164,22 @@ tegra210_xusb_padctl_probe(struct device *dev, 
	}



	pdev = of_find_device_by_node(np);

	of_node_put(np);

	if (!pdev) {

		dev_warn(dev, "PMC device is not available\n");

		goto out;

	}



	if (!platform_get_drvdata(pdev))

	if (!platform_get_drvdata(pdev)) {

		put_device(&pdev->dev);

		return ERR_PTR(-EPROBE_DEFER);

	}



	padctl->regmap = dev_get_regmap(&pdev->dev, "usb_sleepwalk");

	if (!padctl->regmap)

		dev_info(dev, "failed to find PMC regmap\n");



	put_device(&pdev->dev);

out:

	return &padctl->base;

}