Commit 7a46b17d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine 

Pull dmaengine updates from Vinod Koul:
 "New support:

   - New dmaengine_prep_peripheral_dma_vec() to support transfers using
     dma vectors and documentation and user in AXI dma

   - STMicro STM32 DMA3 support and new capabilities of cyclic dma

  Updates:

   - Yaml conversion for Freescale imx dma and qdma bindings,
     sprd sc9860 dma binding

   - Altera msgdma updates for descriptor management"

* tag 'dmaengine-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (35 commits)
  dt-bindings: fsl-qdma: fix interrupts 'if' check logic
  dt-bindings: dma: sprd,sc9860-dma: convert to YAML
  dmaengine: fsl-dpaa2-qdma: add missing MODULE_DESCRIPTION() macro
  dmaengine: ti: add missing MODULE_DESCRIPTION() macros
  dmaengine: ti: cppi41: add missing MODULE_DESCRIPTION() macro
  dmaengine: virt-dma: add missing MODULE_DESCRIPTION() macro
  dmaengine: ti: k3-udma: Fix BCHAN count with UHC and HC channels
  dmaengine: sh: rz-dmac: Fix lockdep assert warning
  dmaengine: qcom: gpi: clean up the IRQ disable/enable in gpi_reset_chan()
  dmaengine: fsl-edma: change the memory access from local into remote mode in i.MX 8QM
  dmaengine: qcom: gpi: remove unused struct 'reg_info'
  dmaengine: moxart-dma: remove unused struct 'moxart_filter_data'
  dt-bindings: fsl-qdma: Convert to yaml format
  dmaengine: fsl-edma: remove redundant "idle" field from fsl_chan
  dmaengine: fsl-edma: request per-channel IRQ only when channel is allocated
  dmaengine: stm32-dma3: defer channel registration to specify channel name
  dmaengine: add channel device name to channel registration
  dmaengine: stm32-dma3: improve residue granularity
  dmaengine: stm32-dma3: add device_pause and device_resume ops
  dmaengine: stm32-dma3: add DMA_MEMCPY capability
  ...
parents 7a3fad30 b8ec9dba

Documentation/devicetree/bindings/dma/fsl,imx-dma.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/fsl,imx-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale Direct Memory Access (DMA) Controller for i.MX



maintainers:

  - Animesh Agarwal <animeshagarwal28@gmail.com>



allOf:

  - $ref: dma-controller.yaml#



properties:

  compatible:

    enum:

      - fsl,imx1-dma

      - fsl,imx21-dma

      - fsl,imx27-dma



  reg:

    maxItems: 1



  interrupts:

    items:

      - description: DMA complete interrupt

      - description: DMA Error interrupt

    minItems: 1



  "#dma-cells":

    const: 1



  dma-channels:

    const: 16



  dma-requests:

    description: Number of DMA requests supported.



required:

  - compatible

  - reg

  - interrupts

  - "#dma-cells"



additionalProperties: false



examples:

  - |

    dma-controller@10001000 {

      compatible = "fsl,imx27-dma";

      reg = <0x10001000 0x1000>;

      interrupts = <32 33>;

      #dma-cells = <1>;

      dma-channels = <16>;

    };

Documentation/devicetree/bindings/dma/fsl-imx-dma.txt

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* Freescale Direct Memory Access (DMA) Controller for i.MX



This document will only describe differences to the generic DMA Controller and

DMA request bindings as described in dma/dma.txt .



* DMA controller



Required properties:

- compatible : Should be "fsl,<chip>-dma". chip can be imx1, imx21 or imx27

- reg : Should contain DMA registers location and length

- interrupts : First item should be DMA interrupt, second one is optional and

    should contain DMA Error interrupt

- #dma-cells : Has to be 1. imx-dma does not support anything else.



Optional properties:

- dma-channels : Number of DMA channels supported. Should be 16.

- #dma-channels : deprecated

- dma-requests : Number of DMA requests supported.

- #dma-requests : deprecated



Example:



	dma: dma@10001000 {

		compatible = "fsl,imx27-dma";

		reg = <0x10001000 0x1000>;

		interrupts = <32 33>;

		#dma-cells = <1>;

		dma-channels = <16>;

	};





* DMA client



Clients have to specify the DMA requests with phandles in a list.



Required properties:

- dmas: List of one or more DMA request specifiers. One DMA request specifier

    consists of a phandle to the DMA controller followed by the integer

    specifying the request line.

- dma-names: List of string identifiers for the DMA requests. For the correct

    names, have a look at the specific client driver.



Example:



	sdhci1: sdhci@10013000 {

		...

		dmas = <&dma 7>;

		dma-names = "rx-tx";

		...

	};

Documentation/devicetree/bindings/dma/fsl-qdma.txt

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NXP Layerscape SoC qDMA Controller

==================================



This device follows the generic DMA bindings defined in dma/dma.txt.



Required properties:



- compatible:		Must be one of

			 "fsl,ls1021a-qdma": for LS1021A Board

			 "fsl,ls1028a-qdma": for LS1028A Board

			 "fsl,ls1043a-qdma": for ls1043A Board

			 "fsl,ls1046a-qdma": for ls1046A Board

- reg:			Should contain the register's base address and length.

- interrupts:		Should contain a reference to the interrupt used by this

			device.

- interrupt-names:	Should contain interrupt names:

			 "qdma-queue0": the block0 interrupt

			 "qdma-queue1": the block1 interrupt

			 "qdma-queue2": the block2 interrupt

			 "qdma-queue3": the block3 interrupt

			 "qdma-error":  the error interrupt

- fsl,dma-queues:	Should contain number of queues supported.

- dma-channels:	Number of DMA channels supported

- block-number:	the virtual block number

- block-offset:	the offset of different virtual block

- status-sizes:	status queue size of per virtual block

- queue-sizes:		command queue size of per virtual block, the size number

			based on queues



Optional properties:



- dma-channels:		Number of DMA channels supported by the controller.

- big-endian:		If present registers and hardware scatter/gather descriptors

			of the qDMA are implemented in big endian mode, otherwise in little

			mode.



Examples:



	qdma: dma-controller@8390000 {

			compatible = "fsl,ls1021a-qdma";

			reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */

			      <0x0 0x8389000 0x0 0x1000>, /* Status regs */

			      <0x0 0x838a000 0x0 0x2000>; /* Block regs */

			interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "qdma-error",

				"qdma-queue0", "qdma-queue1";

			dma-channels = <8>;

			block-number = <2>;

			block-offset = <0x1000>;

			fsl,dma-queues = <2>;

			status-sizes = <64>;

			queue-sizes = <64 64>;

			big-endian;

		};



DMA clients must use the format described in dma/dma.txt file.

Documentation/devicetree/bindings/dma/fsl-qdma.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP Layerscape SoC qDMA Controller



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    enum:

      - fsl,ls1021a-qdma

      - fsl,ls1028a-qdma

      - fsl,ls1043a-qdma

      - fsl,ls1046a-qdma



  reg:

    items:

      - description: Controller regs

      - description: Status regs

      - description: Block regs



  interrupts:

    minItems: 2

    maxItems: 5



  interrupt-names:

    minItems: 2

    items:

      - const: qdma-error

      - const: qdma-queue0

      - const: qdma-queue1

      - const: qdma-queue2

      - const: qdma-queue3



  dma-channels:

    minimum: 1

    maximum: 64



  fsl,dma-queues:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Should contain number of queues supported.

    minimum: 1

    maximum: 4



  block-number:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: the virtual block number



  block-offset:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: the offset of different virtual block



  status-sizes:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: status queue size of per virtual block



  queue-sizes:

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description:

      command queue size of per virtual block, the size number

      based on queues



  big-endian:

    $ref: /schemas/types.yaml#/definitions/flag

    description:

      If present registers and hardware scatter/gather descriptors

      of the qDMA are implemented in big endian mode, otherwise in little

      mode.



required:

  - compatible

  - reg

  - interrupts

  - interrupt-names

  - fsl,dma-queues

  - block-number

  - block-offset

  - status-sizes

  - queue-sizes



allOf:

  - $ref: dma-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,ls1028a-qdma

              - fsl,ls1043a-qdma

              - fsl,ls1046a-qdma

    then:

      properties:

        interrupts:

          minItems: 5

        interrupt-names:

          minItems: 5

    else:

      properties:

        interrupts:

          maxItems: 3

        interrupt-names:

          maxItems: 3



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    dma-controller@8390000 {

        compatible = "fsl,ls1021a-qdma";

        reg = <0x8388000 0x1000>, /* Controller regs */

              <0x8389000 0x1000>, /* Status regs */

              <0x838a000 0x2000>; /* Block regs */

        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";

        #dma-cells = <1>;

        dma-channels = <8>;

        block-number = <2>;

        block-offset = <0x1000>;

        status-sizes = <64>;

        queue-sizes = <64 64>;

        big-endian;

        fsl,dma-queues = <2>;

    };

Documentation/devicetree/bindings/dma/sprd,sc9860-dma.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/sprd,sc9860-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Spreadtrum SC9860 DMA controller



description: |

  There are three DMA controllers: AP DMA, AON DMA and AGCP DMA. For AGCP

  DMA controller, it can or do not request the IRQ, which will save

  system power without resuming system by DMA interrupts if AGCP DMA

  does not request the IRQ.



maintainers:

  - Orson Zhai <orsonzhai@gmail.com>

  - Baolin Wang <baolin.wang7@gmail.com>

  - Chunyan Zhang <zhang.lyra@gmail.com>



properties:

  compatible:

    const: sprd,sc9860-dma



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    minItems: 1

    items:

      - description: DMA enable clock

      - description: optional ashb_eb clock, only for the AGCP DMA controller



  clock-names:

    minItems: 1

    items:

      - const: enable

      - const: ashb_eb



  '#dma-cells':

    const: 1



  dma-channels:

    const: 32



  '#dma-channels':

    const: 32

    deprecated: true



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#dma-cells'

  - dma-channels



allOf:

  - $ref: dma-controller.yaml#



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/sprd,sc9860-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>



    /* AP DMA controller */

    dma-controller@20100000 {

      compatible = "sprd,sc9860-dma";

      reg = <0x20100000 0x4000>;

      interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&apahb_gate CLK_DMA_EB>;

      clock-names = "enable";

      #dma-cells = <1>;

      dma-channels = <32>;

    };



    /* AGCP DMA controller */

    dma-controller@41580000 {

      compatible = "sprd,sc9860-dma";

      reg = <0x41580000 0x4000>;

      clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,

               <&agcp_gate CLK_AGCP_AP_ASHB_EB>;

      clock-names = "enable", "ashb_eb";

      #dma-cells = <1>;

      dma-channels = <32>;

    };

...