Commit 7ad6a8fa authored by John Harrison's avatar John Harrison
Browse files

drm/i915/guc: Enable Wa_14019159160 



Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.

Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Reviewed-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240223205632.1621019-4-John.C.Harrison@Intel.com
parent 6cc7a5c7

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

+3 −0
Original line number Diff line number Diff line
@@ -744,6 +744,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request *rq, u32 *cs) 


/* Wa_14014475959:dg2 */

/* Wa_16019325821 */

/* Wa_14019159160 */

#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET	0x540

static u32 hold_switchout_semaphore_offset(struct i915_request *rq)

{
@@ -753,6 +754,7 @@ static u32 hold_switchout_semaphore_offset(struct i915_request *rq) 


/* Wa_14014475959:dg2 */

/* Wa_16019325821 */

/* Wa_14019159160 */

static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)

{

	int i;
@@ -793,6 +795,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs) 


	/* Wa_14014475959:dg2 */

	/* Wa_16019325821 */

	/* Wa_14019159160 */

	if (intel_engine_uses_wa_hold_switchout(rq->engine))

		cs = hold_switchout_emit_wa_busywait(rq, cs);

drivers/gpu/drm/i915/gt/intel_engine_types.h

+1 −0
Original line number Diff line number Diff line
@@ -697,6 +697,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs * const engine) 


/* Wa_14014475959:dg2 */

/* Wa_16019325821 */

/* Wa_14019159160 */

static inline bool

intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)

{

drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h

+7 −0
Original line number Diff line number Diff line
@@ -101,4 +101,11 @@ enum { 
	GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,

};



/*

 * Workaround keys:

 */

enum {

	GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE				= 0x9001,

};



#endif /* _ABI_GUC_KLVS_ABI_H */

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+1 −0
Original line number Diff line number Diff line
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) 
		flags |= GUC_WA_HOLD_CCS_SWITCHOUT;



	/* Wa_16019325821 */

	/* Wa_14019159160 */

	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))

		flags |= GUC_WA_RCS_CCS_SWITCHOUT;

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

+25 −9
Original line number Diff line number Diff line
@@ -815,6 +815,25 @@ guc_capture_prep_lists(struct intel_guc *guc) 
	return PAGE_ALIGN(total_size);

}



/* Wa_14019159160 */

static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)

{

	u32 size;

	u32 klv_entry[] = {

		/* 16:16 key/length */

		FIELD_PREP(GUC_KLV_0_KEY, GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |

		FIELD_PREP(GUC_KLV_0_LEN, 0),

		/* 0 dwords data */

	};



	size = sizeof(klv_entry);

	GEM_BUG_ON(remain < size);



	iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);



	return size;

}



static void guc_waklv_init(struct intel_guc *guc)

{

	struct intel_gt *gt = guc_to_gt(guc);
@@ -830,15 +849,12 @@ static void guc_waklv_init(struct intel_guc *guc) 
	offset = guc_ads_waklv_offset(guc);

	remain = guc_ads_waklv_size(guc);



	/*

	 * Add workarounds here:

	 *

	 * if (want_wa_<name>) {

	 *	size = guc_waklv_<name>(guc, offset, remain);

	 *	offset += size;

	 *	remain -= size;

	 * }

	 */

	/* Wa_14019159160 */

	if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {

		size = guc_waklv_ra_mode(guc, offset, remain);

		offset += size;

		remain -= size;

	}



	size = guc_ads_waklv_size(guc) - remain;

	if (!size)