Commit 7b75782f authored by Breno Leitao's avatar Breno Leitao Committed by Ingo Molnar
Browse files

x86/bugs: Rename CONFIG_SLS => CONFIG_MITIGATION_SLS 



Step 6/10 of the namespace unification of CPU mitigations related Kconfig options.

Suggested-by: default avatarJosh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: default avatarBreno Leitao <leitao@debian.org>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarJosh Poimboeuf <jpoimboe@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20231121160740.1249350-7-leitao@debian.org
parent aefb2f2e

arch/x86/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -2577,7 +2577,7 @@ config CPU_SRSO 
	help

	  Enable the SRSO mitigation needed on AMD Zen1-4 machines.



config SLS

config MITIGATION_SLS

	bool "Mitigate Straight-Line-Speculation"

	depends on CC_HAS_SLS && X86_64

	select OBJTOOL if HAVE_OBJTOOL

arch/x86/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -205,7 +205,7 @@ ifdef CONFIG_MITIGATION_RETPOLINE 
  endif

endif



ifdef CONFIG_SLS

ifdef CONFIG_MITIGATION_SLS

  KBUILD_CFLAGS += -mharden-sls=all

endif

arch/x86/include/asm/linkage.h

+2 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ 
#if defined(CONFIG_RETHUNK) && !defined(__DISABLE_EXPORTS) && !defined(BUILD_VDSO)

#define RET	jmp __x86_return_thunk

#else /* CONFIG_MITIGATION_RETPOLINE */

#ifdef CONFIG_SLS

#ifdef CONFIG_MITIGATION_SLS

#define RET	ret; int3

#else

#define RET	ret
@@ -55,7 +55,7 @@ 
#if defined(CONFIG_RETHUNK) && !defined(__DISABLE_EXPORTS) && !defined(BUILD_VDSO)

#define ASM_RET	"jmp __x86_return_thunk\n\t"

#else /* CONFIG_MITIGATION_RETPOLINE */

#ifdef CONFIG_SLS

#ifdef CONFIG_MITIGATION_SLS

#define ASM_RET	"ret; int3\n\t"

#else

#define ASM_RET	"ret\n\t"

arch/x86/kernel/alternative.c

+2 −2
Original line number Diff line number Diff line
@@ -708,8 +708,8 @@ static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes) 
	/*

	 * The compiler is supposed to EMIT an INT3 after every unconditional

	 * JMP instruction due to AMD BTC. However, if the compiler is too old

	 * or SLS isn't enabled, we still need an INT3 after indirect JMPs

	 * even on Intel.

	 * or MITIGATION_SLS isn't enabled, we still need an INT3 after

	 * indirect JMPs even on Intel.

	 */

	if (op == JMP32_INSN_OPCODE && i < insn->length)

		bytes[i++] = INT3_INSN_OPCODE;

arch/x86/kernel/ftrace.c

+2 −1
Original line number Diff line number Diff line
@@ -307,7 +307,8 @@ union ftrace_op_code_union { 
	} __attribute__((packed));

};



#define RET_SIZE	(IS_ENABLED(CONFIG_MITIGATION_RETPOLINE) ? 5 : 1 + IS_ENABLED(CONFIG_SLS))

#define RET_SIZE \

	(IS_ENABLED(CONFIG_MITIGATION_RETPOLINE) ? 5 : 1 + IS_ENABLED(CONFIG_MITIGATION_SLS))



static unsigned long

create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)