Commit 7c8ffc55 authored by Frank Li's avatar Frank Li Committed by Shawn Guo
Browse files

arm64: dts: layerscape: remove big-endian for mmc nodes 

According to binding doc fsl,esdhc.yaml, the default endian mode is
big-endian. So remove big-endian property to fix below CHECK_DTBS warnings:

arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: mmc@1560000: Unevaluated properties are not allowed ('big-endian' was unexpected)
        from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml



Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c7ad422f

arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -164,7 +164,6 @@ esdhc0: mmc@1560000 { 
					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;

			bus-width = <4>;

			status = "disabled";

		};
@@ -183,7 +182,6 @@ esdhc1: mmc@1580000 { 
					    QORIQ_CLK_PLL_DIV(1)>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;

			broken-cd;

			bus-width = <4>;

			status = "disabled";

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -431,7 +431,6 @@ esdhc: mmc@1560000 { 
			clock-frequency = <0>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;

			bus-width = <4>;

		};

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -315,7 +315,6 @@ esdhc: mmc@1560000 { 
			clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;

			voltage-ranges = <1800 1800 3300 3300>;

			sdhci,auto-cmd12;

			big-endian;

			bus-width = <4>;

		};
@@ -694,7 +693,6 @@ wdog0: watchdog@2ad0000 { 
			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL

					    QORIQ_CLK_PLL_DIV(2)>;

			big-endian;

		};



		edma0: dma-controller@2c00000 {