Commit 7cb08476 authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'add-support-of-hibmcge-ethernet-driver' 

Jijie Shao says:

====================
Add support of HIBMCGE Ethernet Driver

This patch set adds the support of Hisilicon BMC Gigabit Ethernet Driver.

This patch set includes basic Rx/Tx functionality. It also includes
the registration and interrupt codes.

This work provides the initial support to the HIBMCGE and
would incrementally add features or enhancements.
====================

Link: https://patch.msgid.link/20241015123516.4035035-1-shaojijie@huawei.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents 90cb5f17 f9a002a1

MAINTAINERS

+6 −0
Original line number Diff line number Diff line
@@ -10278,6 +10278,12 @@ S: Maintained 
W:	http://www.hisilicon.com

F:	drivers/net/ethernet/hisilicon/hns3/









HISILICON NETWORK HIBMCGE DRIVER









M:	Jijie Shao <shaojijie@huawei.com>









L:	netdev@vger.kernel.org









S:	Maintained









F:	drivers/net/ethernet/hisilicon/hibmcge/

















HISILICON NETWORK SUBSYSTEM DRIVER









M:	Jian Shen <shenjian15@huawei.com>









M:	Salil Mehta <salil.mehta@huawei.com>
































drivers/net/ethernet/hisilicon/Kconfig



+17
−1






























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Diff line







@@ -7,7 +7,6 @@ config NET_VENDOR_HISILICON







	bool "Hisilicon devices"









	default y









	depends on OF || ACPI









	depends on ARM || ARM64 || COMPILE_TEST









	help









	  If you have a network (Ethernet) card belonging to this class, say Y.


















@@ -18,6 +17,8 @@ config NET_VENDOR_HISILICON

















if NET_VENDOR_HISILICON



















if ARM || ARM64 || COMPILE_TEST



















config HIX5HD2_GMAC









	tristate "Hisilicon HIX5HD2 Family Network Device Support"









	select PHYLIB








@@ -141,4 +142,19 @@ config HNS3_ENET

















endif #HNS3



















endif # ARM || ARM64 || COMPILE_TEST



















config HIBMCGE









	tristate "Hisilicon BMC Gigabit Ethernet Device Support"









	depends on PCI && PCI_MSI









	select PHYLIB









	select MOTORCOMM_PHY









	select REALTEK_PHY









	help









	  If you wish to compile a kernel for a BMC with HIBMC-xx_gmac









	  then you should answer Y to this. This makes this driver suitable for use









	  on certain boards such as the HIBMC-210.



















	  If you are unsure, say N.



















endif # NET_VENDOR_HISILICON
























drivers/net/ethernet/hisilicon/Makefile



+1
−0






























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@@ -9,3 +9,4 @@ obj-$(CONFIG_HNS_MDIO) += hns_mdio.o







obj-$(CONFIG_HNS) += hns/









obj-$(CONFIG_HNS3) += hns3/









obj-$(CONFIG_HISI_FEMAC) += hisi_femac.o









obj-$(CONFIG_HIBMCGE) += hibmcge/
























drivers/net/ethernet/hisilicon/hibmcge/Makefile
0 → 100644



+8
−0






























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# SPDX-License-Identifier: GPL-2.0+









#









# Makefile for the HISILICON BMC GE network device drivers.









#



















obj-$(CONFIG_HIBMCGE) += hibmcge.o



















hibmcge-objs = hbg_main.o hbg_hw.o hbg_mdio.o hbg_irq.o hbg_txrx.o hbg_ethtool.o
























drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
0 → 100644



+131
−0






























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Diff line









/* SPDX-License-Identifier: GPL-2.0+ */









/* Copyright (c) 2024 Hisilicon Limited. */



















#ifndef __HBG_COMMON_H









#define __HBG_COMMON_H



















#include <linux/netdevice.h>









#include <linux/pci.h>









#include "hbg_reg.h"



















#define HBG_STATUS_DISABLE		0x0









#define HBG_STATUS_ENABLE		0x1









#define HBG_RX_SKIP1			0x00









#define HBG_RX_SKIP2			0x01









#define HBG_VECTOR_NUM			4









#define HBG_PCU_CACHE_LINE_SIZE		32









#define HBG_TX_TIMEOUT_BUF_LEN		1024









#define HBG_RX_DESCR			0x01



















#define HBG_PACKET_HEAD_SIZE	((HBG_RX_SKIP1 + HBG_RX_SKIP2 + \









				  HBG_RX_DESCR) * HBG_PCU_CACHE_LINE_SIZE)



















enum hbg_dir {









	HBG_DIR_TX = 1 << 0,









	HBG_DIR_RX = 1 << 1,









	HBG_DIR_TX_RX = HBG_DIR_TX | HBG_DIR_RX,









};



















enum hbg_tx_state {









	HBG_TX_STATE_COMPLETE = 0, /* clear state, must fix to 0 */









	HBG_TX_STATE_START,









};



















enum hbg_nic_state {









	HBG_NIC_STATE_EVENT_HANDLING = 0,









};



















struct hbg_buffer {









	u32 state;









	dma_addr_t state_dma;



















	struct sk_buff *skb;









	dma_addr_t skb_dma;









	u32 skb_len;



















	enum hbg_dir dir;









	struct hbg_ring *ring;









	struct hbg_priv *priv;









};



















struct hbg_ring {









	struct hbg_buffer *queue;









	dma_addr_t queue_dma;



















	union {









		u32 head;









		u32 ntc;









	};









	union {









		u32 tail;









		u32 ntu;









	};









	u32 len;



















	enum hbg_dir dir;









	struct hbg_priv *priv;









	struct napi_struct napi;









	char *tout_log_buf; /* tx timeout log buffer */









};



















enum hbg_hw_event_type {









	HBG_HW_EVENT_NONE = 0,









	HBG_HW_EVENT_INIT, /* driver is loading */









	HBG_HW_EVENT_RESET,









};



















struct hbg_dev_specs {









	u32 mac_id;









	struct sockaddr mac_addr;









	u32 phy_addr;









	u32 mdio_frequency;









	u32 rx_fifo_num;









	u32 tx_fifo_num;









	u32 vlan_layers;









	u32 max_mtu;









	u32 min_mtu;



















	u32 max_frame_len;









	u32 rx_buf_size;









};



















struct hbg_irq_info {









	const char *name;









	u32 mask;









	bool re_enable;









	bool need_print;









	u64 count;



















	void (*irq_handle)(struct hbg_priv *priv, struct hbg_irq_info *info);









};



















struct hbg_vector {









	char name[HBG_VECTOR_NUM][32];









	struct hbg_irq_info *info_array;









	u32 info_array_len;









};



















struct hbg_mac {









	struct mii_bus *mdio_bus;









	struct phy_device *phydev;









	u8 phy_addr;



















	u32 speed;









	u32 duplex;









	u32 autoneg;









	u32 link_status;









};



















struct hbg_priv {









	struct net_device *netdev;









	struct pci_dev *pdev;









	u8 __iomem *io_base;









	struct hbg_dev_specs dev_specs;









	unsigned long state;









	struct hbg_mac mac;









	struct hbg_vector vectors;









	struct hbg_ring tx_ring;









	struct hbg_ring rx_ring;









};



















#endif