Unverified Commit 7cb7b8fe authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'sunplus/newsoc' into arm/newsoc 

Merge "Sunplus SP7021 SoC support" from Qin Jian, applied
as patches:

 "Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many
  peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a
  single chip. It is designed for industrial control.

  SP7021 consists of two chips (dies) in a package. One is called C-chip
  (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level
  process (22 nm) for high performance computing. The other is called P-
  chip (peripheral chip). It has many peripherals and an ARM A926 added
  especially for real-time control. P-chip is made for customers. It adopts
  low-level process (ex: 0.11 um) to reduce cost.

  Refer to (for documentations):
  https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview

  Refer to (applications):
  https://tibbo.com/store/plus1.html

  Refer to (applications):
  http://www.sinovoip.com.cn/ecp_view.asp?id=586"

I left out the clock controller driver, which is still not fully
reviewed. There have been 20 revisions of the platform code, and
everything else looks good enough, so I hope it's we can simplify
the process by separating it out again.

Link: https://lore.kernel.org/linux-arm-kernel/0c10fa4ccf3da5d92784b9bbd4177d1d2f1d62a0.1656396767.git.qinjian@cqplus1.com/

* sunplus/newsoc:
  ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree
  ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig
  ARM: sunplus: Add initial support for Sunplus SP7021 SoC
  irqchip: Add Sunplus SP7021 interrupt controller driver
  dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller
  dt-bindings: clock: Add bindings for SP7021 clock driver
  reset: Add Sunplus SP7021 reset driver
  dt-bindings: reset: Add bindings for SP7021 reset driver
  dt-bindings: arm: sunplus: Add bindings for Sunplus SP7021 SoC boards
parents 03c765b0 f6639994

Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) Sunplus Co., Ltd. 2021

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/sunplus,sp7021.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Sunplus SP7021 Boards



maintainers:

  - qinjian <qinjian@cqplus1.com>



description: |

  ARM platforms using Sunplus SP7021, an ARM Cortex A7 (4-cores) based SoC.

  Wiki: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview



properties:

  $nodename:

    const: '/'

  compatible:

    items:

      - enum:

          - sunplus,sp7021-achip

          - sunplus,sp7021-demo-v3

      - const: sunplus,sp7021



additionalProperties: true



...

Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) Sunplus Co., Ltd. 2021

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Sunplus SP7021 SoC Clock Controller



maintainers:

  - Qin Jian <qinjian@cqplus1.com>



properties:

  compatible:

    const: sunplus,sp7021-clkc



  reg:

    maxItems: 3



  clocks:

    maxItems: 1



  "#clock-cells":

    const: 1



required:

  - compatible

  - reg

  - clocks

  - "#clock-cells"



additionalProperties: false



examples:

  - |

    extclk: osc0 {

      compatible = "fixed-clock";

      #clock-cells = <0>;

      clock-frequency = <27000000>;

      clock-output-names = "extclk";

    };



    clkc: clock-controller@9c000004 {

      compatible = "sunplus,sp7021-clkc";

      reg = <0x9c000004 0x28>,

            <0x9c000200 0x44>,

            <0x9c000268 0x08>;

      clocks = <&extclk>;

      #clock-cells = <1>;

    };



...

Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) Sunplus Co., Ltd. 2021

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Sunplus SP7021 SoC Interrupt Controller



maintainers:

  - Qin Jian <qinjian@cqplus1.com>



properties:

  compatible:

    items:

      - const: sunplus,sp7021-intc



  reg:

    maxItems: 2

    description:

      Specifies base physical address(s) and size of the controller regs.

      The 1st region include type/polarity/priority/mask regs.

      The 2nd region include clear/masked_ext0/masked_ext1/group regs.



  interrupt-controller: true



  "#interrupt-cells":

    const: 2

    description:

      The first cell is the IRQ number, the second cell is the trigger

      type as defined in interrupt.txt in this directory.



  interrupts:

    maxItems: 2

    description:

      EXT_INT0 & EXT_INT1, 2 interrupts references to primary interrupt

      controller.



required:

  - compatible

  - reg

  - interrupt-controller

  - "#interrupt-cells"

  - interrupts



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    intc: interrupt-controller@9c000780 {

        compatible = "sunplus,sp7021-intc";

        reg = <0x9c000780 0x80>, <0x9c000a80 0x80>;

        interrupt-controller;

        #interrupt-cells = <2>;

        interrupt-parent = <&gic>;

        interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, /* EXT_INT0 */

                     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; /* EXT_INT1 */

    };



...

Documentation/devicetree/bindings/reset/sunplus,reset.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) Sunplus Co., Ltd. 2021

%YAML 1.2

---

$id: "http://devicetree.org/schemas/reset/sunplus,reset.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Sunplus SoC Reset Controller



maintainers:

  - Qin Jian <qinjian@cqplus1.com>



properties:

  compatible:

    const: sunplus,sp7021-reset



  reg:

    maxItems: 1



  "#reset-cells":

    const: 1



required:

  - compatible

  - reg

  - "#reset-cells"



additionalProperties: false



examples:

  - |

    rstc: reset@9c000054 {

      compatible = "sunplus,sp7021-reset";

      reg = <0x9c000054 0x28>;

      #reset-cells = <1>;

    };



...

MAINTAINERS

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@@ -2825,6 +2825,23 @@ F: drivers/clocksource/armv7m_systick.c 
N:	stm32

N:	stm









ARM/SUNPLUS SP7021 SOC SUPPORT









M:	Qin Jian <qinjian@cqplus1.com>









L:	linux-arm-kernel@lists.infradead.org (moderated for mon-subscribers)









S:	Maintained









W:	https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview









F:	Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml









F:	Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml









F:	Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml









F:	Documentation/devicetree/bindings/reset/sunplus,reset.yaml









F:	arch/arm/boot/dts/sunplus-sp7021*.dts*









F:	arch/arm/configs/sp7021_*defconfig









F:	arch/arm/mach-sunplus/









F:	drivers/irqchip/irq-sp7021-intc.c









F:	drivers/reset/reset-sunplus.c









F:	include/dt-bindings/clock/sunplus,sp7021-clkc.h









F:	include/dt-bindings/reset/sunplus,sp7021-reset.h

















ARM/Synaptics SoC support









M:	Jisheng Zhang <jszhang@kernel.org>









M:	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>