Commit 7d09d80b authored by Aurabindo Pillai's avatar Aurabindo Pillai Committed by Alex Deucher
Browse files

drm/amd: define new gfx12 uapi flags 



define new gfx12 uapi flags

Signed-off-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7ceb94e8

include/uapi/drm/amdgpu_drm.h

+13 −1
Original line number Diff line number Diff line
@@ -392,7 +392,7 @@ struct drm_amdgpu_gem_userptr { 
#define AMDGPU_TILING_NUM_BANKS_SHIFT			21

#define AMDGPU_TILING_NUM_BANKS_MASK			0x3



/* GFX9 and later: */

/* GFX9 - GFX11: */

#define AMDGPU_TILING_SWIZZLE_MODE_SHIFT		0

#define AMDGPU_TILING_SWIZZLE_MODE_MASK			0x1f

#define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT		5
@@ -406,6 +406,17 @@ struct drm_amdgpu_gem_userptr { 
#define AMDGPU_TILING_SCANOUT_SHIFT			63

#define AMDGPU_TILING_SCANOUT_MASK			0x1



/* GFX12 and later: */

#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT			0

#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK			0x7

/* These are DCC recompression setting for memory management: */

#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT	3

#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK	0x3 /* 0:64B, 1:128B, 2:256B */

#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT		5

#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK		0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */

#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT		8

#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK		0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */



/* Set/Get helpers for tiling flags. */

#define AMDGPU_TILING_SET(field, value) \

	(((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT)
@@ -1268,6 +1279,7 @@ struct drm_amdgpu_info_gpuvm_fault { 
#define AMDGPU_FAMILY_GC_10_3_6			149 /* GC 10.3.6 */

#define AMDGPU_FAMILY_GC_10_3_7			151 /* GC 10.3.7 */

#define AMDGPU_FAMILY_GC_11_5_0			150 /* GC 11.5.0 */

#define AMDGPU_FAMILY_GC_12_0_0         152 /* GC 12.0.0 */



#if defined(__cplusplus)

}