Commit 7d75ef37 authored by Boyuan Zhang's avatar Boyuan Zhang Committed by Alex Deucher
Browse files

drm/amdgpu/vcn: not pause dpg for unified queue 



For unified queue, DPG pause for encoding is done inside VCN firmware,
so there is no need to pause dpg based on ring type in kernel.

For VCN3 and below, pausing DPG for encoding in kernel is still needed.

v2: add more comments
v3: update commit message

Signed-off-by: default avatarBoyuan Zhang <boyuan.zhang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarRuijing Dong <ruijing.dong@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ecfa23c8

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+11 −3
Original line number Diff line number Diff line
@@ -389,7 +389,9 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work) 
		for (i = 0; i < adev->vcn.num_enc_rings; ++i)

			fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]);



		if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)	{

		/* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */

		if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG &&

		    !adev->vcn.using_unified_queue) {

			struct dpg_pause_state new_state;



			if (fence[j] ||
@@ -435,7 +437,9 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) 
	amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,

	       AMD_PG_STATE_UNGATE);



	if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)	{

	/* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */

	if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG &&

	    !adev->vcn.using_unified_queue) {

		struct dpg_pause_state new_state;



		if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) {
@@ -461,8 +465,12 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) 


void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;



	/* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */

	if (ring->adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG &&

		ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC)

	    ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC &&

	    !adev->vcn.using_unified_queue)

		atomic_dec(&ring->adev->vcn.inst[ring->me].dpg_enc_submission_cnt);



	atomic_dec(&ring->adev->vcn.total_submission_cnt);