Unverified Commit 7e0b0cc1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-arm-5.20-1' of... 

Merge tag 'mvebu-arm-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/soc

mvebu arm for 5.20 (part 1)

Update PCIe fixup for old Marvell SoCs: dove, orion5 and mv78xx0.

* tag 'mvebu-arm-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: Marvell: Update PCIe fixup

Link: https://lore.kernel.org/r/87ilntqn0v.fsf@BL-laptop


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c5560db5 fdaa3725

arch/arm/mach-dove/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ menuconfig ARCH_DOVE 
	select PINCTRL_DOVE

	select PLAT_ORION_LEGACY

	select PM_GENERIC_DOMAINS if PM

	select PCI_QUIRKS if PCI

	help

	  Support for the Marvell Dove SoC 88AP510

arch/arm/mach-dove/pcie.c

+8 −3
Original line number Diff line number Diff line
@@ -136,14 +136,19 @@ static struct pci_ops pcie_ops = { 
	.write = pcie_wr_conf,

};



static void rc_pci_fixup(struct pci_dev *dev)

{

/*

	 * Prevent enumeration of root complex.

 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it

 * is operating as a root complex this needs to be switched to

 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on

 * the device. Decoding setup is handled by the orion code.

 */

static void rc_pci_fixup(struct pci_dev *dev)

{

	if (dev->bus->parent == NULL && dev->devfn == 0) {

		int i;



		dev->class &= 0xff;

		dev->class |= PCI_CLASS_BRIDGE_HOST << 8;

		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {

			dev->resource[i].start = 0;

			dev->resource[i].end   = 0;

arch/arm/mach-mv78xx0/pcie.c

+8 −3
Original line number Diff line number Diff line
@@ -180,14 +180,19 @@ static struct pci_ops pcie_ops = { 
	.write = pcie_wr_conf,

};



static void rc_pci_fixup(struct pci_dev *dev)

{

/*

	 * Prevent enumeration of root complex.

 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it

 * is operating as a root complex this needs to be switched to

 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on

 * the device. Decoding setup is handled by the orion code.

 */

static void rc_pci_fixup(struct pci_dev *dev)

{

	if (dev->bus->parent == NULL && dev->devfn == 0) {

		int i;



		dev->class &= 0xff;

		dev->class |= PCI_CLASS_BRIDGE_HOST << 8;

		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {

			dev->resource[i].start = 0;

			dev->resource[i].end   = 0;

arch/arm/mach-orion5x/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ menuconfig ARCH_ORION5X 
	select GPIOLIB

	select MVEBU_MBUS

	select FORCE_PCI

	select PCI_QUIRKS

	select PHYLIB if NETDEVICES

	select PLAT_ORION_LEGACY

	help

arch/arm/mach-orion5x/pci.c

+9 −3
Original line number Diff line number Diff line
@@ -515,14 +515,20 @@ static int __init pci_setup(struct pci_sys_data *sys) 
/*****************************************************************************

 * General PCIe + PCI

 ****************************************************************************/

static void rc_pci_fixup(struct pci_dev *dev)

{



/*

	 * Prevent enumeration of root complex.

 * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it

 * is operating as a root complex this needs to be switched to

 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on

 * the device. Decoding setup is handled by the orion code.

 */

static void rc_pci_fixup(struct pci_dev *dev)

{

	if (dev->bus->parent == NULL && dev->devfn == 0) {

		int i;



		dev->class &= 0xff;

		dev->class |= PCI_CLASS_BRIDGE_HOST << 8;

		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {

			dev->resource[i].start = 0;

			dev->resource[i].end   = 0;