Commit 7e281838 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-6.17-2025-07-01' of...

Merge tag 'amd-drm-next-6.17-2025-07-01' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-6.17-2025-07-01:

amdgpu:
- FAMS2 fixes
- OLED fixes
- Misc cleanups
- AUX fixes
- DMCUB updates
- SR-IOV hibernation support
- RAS updates
- DP tunneling fixes
- DML2 fixes
- Backlight improvements
- Suspend improvements
- Use scaling for non-native modes on eDP
- SDMA 4.4.x fixes
- PCIe DPM fixes
- SDMA 5.x fixes
- Cleaner shader updates for GC 9.x
- Remove fence slab
- ISP genpd support
- Parition handling rework
- SDMA FW checks for userq support
- Add missing firmware declaration
- Fix leak in amdgpu_ctx_mgr_entity_fini()
- Freesync fix
- Ring reset refactoring
- Legacy dpm verbosity changes

amdkfd:
- GWS fix
- mtype fix for ext coherent system memory
- MMU notifier fix
- gfx7/8 fix

radeon:
- CS validation support for additional GL extensions
- Bump driver version for new CS validation checks

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250701194707.32905-1-alexander.deucher@amd.com


Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parents f41830c5 2ecdb61f
Loading
Loading
Loading
Loading
+18 −0
Original line number Diff line number Diff line
@@ -85,3 +85,21 @@ UMR
GPU debugging and diagnostics tool.  Please see the umr
`documentation <https://umr.readthedocs.io/en/main/>`_ for more information
about its capabilities.

Debugging backlight brightness
==============================
Default backlight brightness is intended to be set via the policy advertised
by the firmware.  Firmware will often provide different defaults for AC or DC.
Furthermore, some userspace software will save backlight brightness during
the previous boot and attempt to restore it.

Some firmware also has support for a feature called "Custom Backlight Curves"
where an input value for brightness is mapped along a linearly interpolated
curve of brightness values that better match display characteristics.

In the event of problems happening with backlight, there is a trace event
that can be enabled at bootup to log every brightness change request.
This can help isolate where the problem is. To enable the trace event add
the following to the kernel command line:

  tp_printk trace_event=amdgpu_dm:amdgpu_dm_brightness:mod:amdgpu trace_buf_size=1M
+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \
	amdgpu_fw_attestation.o amdgpu_securedisplay.o \
	amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \
	amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o amdgpu_dev_coredump.o \
	amdgpu_cper.o amdgpu_userq_fence.o amdgpu_eviction_fence.o
	amdgpu_cper.o amdgpu_userq_fence.o amdgpu_eviction_fence.o amdgpu_ip.o

amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o

+29 −4
Original line number Diff line number Diff line
@@ -71,18 +71,29 @@ aldebaran_get_reset_handler(struct amdgpu_reset_control *reset_ctl,
	return NULL;
}

static inline uint32_t aldebaran_get_ip_block_mask(struct amdgpu_device *adev)
{
	uint32_t ip_block_mask = BIT(AMD_IP_BLOCK_TYPE_GFX) |
				 BIT(AMD_IP_BLOCK_TYPE_SDMA);

	if (adev->aid_mask)
		ip_block_mask |= BIT(AMD_IP_BLOCK_TYPE_IH);

	return ip_block_mask;
}

static int aldebaran_mode2_suspend_ip(struct amdgpu_device *adev)
{
	uint32_t ip_block_mask = aldebaran_get_ip_block_mask(adev);
	uint32_t ip_block;
	int r, i;

	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);

	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
		if (!(adev->ip_blocks[i].version->type ==
			      AMD_IP_BLOCK_TYPE_GFX ||
		      adev->ip_blocks[i].version->type ==
			      AMD_IP_BLOCK_TYPE_SDMA))
		ip_block = BIT(adev->ip_blocks[i].version->type);
		if (!(ip_block_mask & ip_block))
			continue;

		r = amdgpu_ip_block_suspend(&adev->ip_blocks[i]);
@@ -200,8 +211,10 @@ aldebaran_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl,
static int aldebaran_mode2_restore_ip(struct amdgpu_device *adev)
{
	struct amdgpu_firmware_info *ucode_list[AMDGPU_UCODE_ID_MAXIMUM];
	uint32_t ip_block_mask = aldebaran_get_ip_block_mask(adev);
	struct amdgpu_firmware_info *ucode;
	struct amdgpu_ip_block *cmn_block;
	struct amdgpu_ip_block *ih_block;
	int ucode_count = 0;
	int i, r;

@@ -243,6 +256,18 @@ static int aldebaran_mode2_restore_ip(struct amdgpu_device *adev)
	if (r)
		return r;

	if (ip_block_mask & BIT(AMD_IP_BLOCK_TYPE_IH)) {
		ih_block = amdgpu_device_ip_get_ip_block(adev,
							 AMD_IP_BLOCK_TYPE_IH);
		if (unlikely(!ih_block)) {
			dev_err(adev->dev, "Failed to get IH handle\n");
			return -EINVAL;
		}
		r = amdgpu_ip_block_resume(ih_block);
		if (r)
			return r;
	}

	/* Reinit GFXHUB */
	adev->gfxhub.funcs->init(adev);
	r = adev->gfxhub.funcs->gart_enable(adev);
+24 −4
Original line number Diff line number Diff line
@@ -470,9 +470,6 @@ struct amdgpu_sa_manager {
	void				*cpu_ptr;
};

int amdgpu_fence_slab_init(void);
void amdgpu_fence_slab_fini(void);

/*
 * IRQS.
 */
@@ -1282,6 +1279,7 @@ struct amdgpu_device {
	bool                            debug_exp_resets;
	bool                            debug_disable_gpu_ring_reset;
	bool                            debug_vm_userptr;
	bool                            debug_disable_ce_logs;

	/* Protection for the following isolation structure */
	struct mutex                    enforce_isolation_mutex;
@@ -1336,6 +1334,11 @@ static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)
	return container_of(bdev, struct amdgpu_device, mman.bdev);
}

static inline bool amdgpu_is_multi_aid(struct amdgpu_device *adev)
{
	return !!adev->aid_mask;
}

int amdgpu_device_init(struct amdgpu_device *adev,
		       uint32_t flags);
void amdgpu_device_fini_hw(struct amdgpu_device *adev);
@@ -1387,7 +1390,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev,
				   u64 reg_addr, u64 reg_data);
u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
bool amdgpu_device_asic_has_dc_support(struct pci_dev *pdev,
				       enum amd_asic_type asic_type);
bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);

void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
@@ -1619,6 +1623,7 @@ void amdgpu_driver_release_kms(struct drm_device *dev);

int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
int amdgpu_device_prepare(struct drm_device *dev);
void amdgpu_device_complete(struct drm_device *dev);
int amdgpu_device_suspend(struct drm_device *dev, bool fbcon);
int amdgpu_device_resume(struct drm_device *dev, bool fbcon);
u32 amdgpu_get_vblank_counter_kms(struct drm_crtc *crtc);
@@ -1760,4 +1765,19 @@ extern const struct attribute_group amdgpu_flash_attr_group;

void amdgpu_set_init_level(struct amdgpu_device *adev,
			   enum amdgpu_init_lvl_id lvl);

static inline int amdgpu_device_bus_status_check(struct amdgpu_device *adev)
{
       u32 status;
       int r;

       r = pci_read_config_dword(adev->pdev, PCI_COMMAND, &status);
       if (r || PCI_POSSIBLE_ERROR(status)) {
		dev_err(adev->dev, "device lost from bus!");
		return -ENODEV;
       }

       return 0;
}

#endif
+5 −0
Original line number Diff line number Diff line
@@ -115,6 +115,11 @@ static void aca_smu_bank_dump(struct amdgpu_device *adev, int idx, int total, st
	u64 event_id = qctx ? qctx->evid.event_id : RAS_EVENT_INVALID_ID;
	int i;

	if (adev->debug_disable_ce_logs &&
	    bank->smu_err_type == ACA_SMU_TYPE_CE &&
	    !ACA_BANK_ERR_IS_DEFFERED(bank))
		return;

	RAS_EVENT_LOG(adev, event_id, HW_ERR "Accelerator Check Architecture events logged\n");
	/* plus 1 for output format, e.g: ACA[08/08]: xxxx */
	for (i = 0; i < ARRAY_SIZE(aca_regs); i++)
Loading