Unverified Commit 7ecea18e authored by Himal Prasad Ghimiray's avatar Himal Prasad Ghimiray Committed by Rodrigo Vivi
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drm/xe: Cleanup force wake registers bit definitions 



- Remove unused bit definitions.
- Driver uses BIT(0) for waking/sleeping the domain and since the
registers are masked respective mask bit BIT(16) needs to be set. Use
defines for these bits and use them in domain initialization.

v3
- Use defines within domain_init

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Suggested-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Reviewed-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240606085720.1327152-1-himal.prasad.ghimiray@intel.com


Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 3d420e9f

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+5 −3
Original line number Diff line number Diff line
@@ -487,9 +487,11 @@ 
	((ccs) << ((cslice) * CCS_MODE_CSLICE_WIDTH))



#define FORCEWAKE_ACK_GT			XE_REG(0x130044)

#define   FORCEWAKE_KERNEL			BIT(0)

#define   FORCEWAKE_USER			BIT(1)

#define   FORCEWAKE_KERNEL_FALLBACK		BIT(15)



/* Applicable for all FORCEWAKE_DOMAIN and FORCEWAKE_ACK_DOMAIN regs */

#define   FORCEWAKE_KERNEL			0

#define   FORCEWAKE_MT(bit)			BIT(bit)

#define   FORCEWAKE_MT_MASK(bit)		BIT((bit) + 16)



#define MTL_MEDIA_PERF_LIMIT_REASONS		XE_REG(0x138030)

#define MTL_MEDIA_MC6				XE_REG(0x138048)

drivers/gpu/drm/xe/xe_force_wake.c

+9 −15
Original line number Diff line number Diff line
@@ -28,13 +28,13 @@ fw_to_xe(struct xe_force_wake *fw) 


static void domain_init(struct xe_force_wake_domain *domain,

			enum xe_force_wake_domain_id id,

			struct xe_reg reg, struct xe_reg ack, u32 val, u32 mask)

			struct xe_reg reg, struct xe_reg ack)

{

	domain->id = id;

	domain->reg_ctl = reg;

	domain->reg_ack = ack;

	domain->val = val;

	domain->mask = mask;

	domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);

	domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);

}



void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -51,14 +51,12 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw) 
		domain_init(&fw->domains[XE_FW_DOMAIN_ID_GT],

			    XE_FW_DOMAIN_ID_GT,

			    FORCEWAKE_GT,

			    FORCEWAKE_ACK_GT_MTL,

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_GT_MTL);

	} else {

		domain_init(&fw->domains[XE_FW_DOMAIN_ID_GT],

			    XE_FW_DOMAIN_ID_GT,

			    FORCEWAKE_GT,

			    FORCEWAKE_ACK_GT,

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_GT);

	}

}
@@ -73,8 +71,7 @@ void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw) 
		domain_init(&fw->domains[XE_FW_DOMAIN_ID_RENDER],

			    XE_FW_DOMAIN_ID_RENDER,

			    FORCEWAKE_RENDER,

			    FORCEWAKE_ACK_RENDER,

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_RENDER);



	for (i = XE_HW_ENGINE_VCS0, j = 0; i <= XE_HW_ENGINE_VCS7; ++i, ++j) {

		if (!(gt->info.engine_mask & BIT(i)))
@@ -83,8 +80,7 @@ void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw) 
		domain_init(&fw->domains[XE_FW_DOMAIN_ID_MEDIA_VDBOX0 + j],

			    XE_FW_DOMAIN_ID_MEDIA_VDBOX0 + j,

			    FORCEWAKE_MEDIA_VDBOX(j),

			    FORCEWAKE_ACK_MEDIA_VDBOX(j),

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_MEDIA_VDBOX(j));

	}



	for (i = XE_HW_ENGINE_VECS0, j = 0; i <= XE_HW_ENGINE_VECS3; ++i, ++j) {
@@ -94,16 +90,14 @@ void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw) 
		domain_init(&fw->domains[XE_FW_DOMAIN_ID_MEDIA_VEBOX0 + j],

			    XE_FW_DOMAIN_ID_MEDIA_VEBOX0 + j,

			    FORCEWAKE_MEDIA_VEBOX(j),

			    FORCEWAKE_ACK_MEDIA_VEBOX(j),

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_MEDIA_VEBOX(j));

	}



	if (gt->info.engine_mask & BIT(XE_HW_ENGINE_GSCCS0))

		domain_init(&fw->domains[XE_FW_DOMAIN_ID_GSC],

			    XE_FW_DOMAIN_ID_GSC,

			    FORCEWAKE_GSC,

			    FORCEWAKE_ACK_GSC,

			    BIT(0), BIT(16));

			    FORCEWAKE_ACK_GSC);

}



static void domain_wake(struct xe_gt *gt, struct xe_force_wake_domain *domain)