Commit 7fcf00bd authored by Anantha Prabhu's avatar Anantha Prabhu Committed by Jason Gunthorpe
Browse files

RDMA/bnxt_re: Remove non-statistics counters from hw_counters 

Remove non-statistics counters from the RDMA hw_counters framework.
The removed data includes:

- Active resource counts (ACTIVE_PD, ACTIVE_QP, etc.)
- Resource watermarks (WATERMARK_PD, WATERMARK_QP, etc.)
- Operational counters (RESIZE_CQ_CNT)
- DB pacing metrics (PACING_RESCHED, PACING_CMPL, etc.)

This change ensures hw_counters contains only true performance
and error statistics.

Link: https://patch.msgid.link/r/20250923062657.981487-3-kalesh-anakkur.purayil@broadcom.com


Signed-off-by: default avatarAnantha Prabhu <anantha.prabhu@broadcom.com>
Signed-off-by: default avatarKalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent 604f202b

drivers/infiniband/hw/bnxt_re/hw_counters.c

+0 −58
Original line number Diff line number Diff line
@@ -51,25 +51,6 @@ 
#include "hw_counters.h"



static const struct rdma_stat_desc bnxt_re_stat_descs[] = {

	[BNXT_RE_ACTIVE_PD].name		=  "active_pds",

	[BNXT_RE_ACTIVE_AH].name		=  "active_ahs",

	[BNXT_RE_ACTIVE_QP].name		=  "active_qps",

	[BNXT_RE_ACTIVE_RC_QP].name             =  "active_rc_qps",

	[BNXT_RE_ACTIVE_UD_QP].name             =  "active_ud_qps",

	[BNXT_RE_ACTIVE_SRQ].name		=  "active_srqs",

	[BNXT_RE_ACTIVE_CQ].name		=  "active_cqs",

	[BNXT_RE_ACTIVE_MR].name		=  "active_mrs",

	[BNXT_RE_ACTIVE_MW].name		=  "active_mws",

	[BNXT_RE_WATERMARK_PD].name             =  "watermark_pds",

	[BNXT_RE_WATERMARK_AH].name             =  "watermark_ahs",

	[BNXT_RE_WATERMARK_QP].name             =  "watermark_qps",

	[BNXT_RE_WATERMARK_RC_QP].name          =  "watermark_rc_qps",

	[BNXT_RE_WATERMARK_UD_QP].name          =  "watermark_ud_qps",

	[BNXT_RE_WATERMARK_SRQ].name            =  "watermark_srqs",

	[BNXT_RE_WATERMARK_CQ].name             =  "watermark_cqs",

	[BNXT_RE_WATERMARK_MR].name             =  "watermark_mrs",

	[BNXT_RE_WATERMARK_MW].name             =  "watermark_mws",

	[BNXT_RE_RESIZE_CQ_CNT].name            =  "resize_cq_cnt",

	[BNXT_RE_RX_PKTS].name		=  "rx_pkts",

	[BNXT_RE_RX_BYTES].name		=  "rx_bytes",

	[BNXT_RE_TX_PKTS].name		=  "tx_pkts",
@@ -139,10 +120,6 @@ static const struct rdma_stat_desc bnxt_re_stat_descs[] = { 
	[BNXT_RE_TX_CNP].name                = "np_cnp_pkts",

	[BNXT_RE_RX_CNP].name                = "rp_cnp_handled",

	[BNXT_RE_RX_ECN].name                = "np_ecn_marked_roce_packets",

	[BNXT_RE_PACING_RESCHED].name        = "pacing_reschedule",

	[BNXT_RE_PACING_CMPL].name           = "pacing_complete",

	[BNXT_RE_PACING_ALERT].name          = "pacing_alerts",

	[BNXT_RE_DB_FIFO_REG].name           = "db_fifo_register",

	[BNXT_RE_REQ_CQE_ERROR].name            = "req_cqe_error",

	[BNXT_RE_RESP_CQE_ERROR].name           = "resp_cqe_error",

	[BNXT_RE_RESP_REMOTE_ACCESS_ERRS].name  = "resp_remote_access_errors",
@@ -292,18 +269,6 @@ static void bnxt_re_copy_err_stats(struct bnxt_re_dev *rdev, 
			err_s->res_tx_no_perm;

}



static void bnxt_re_copy_db_pacing_stats(struct bnxt_re_dev *rdev,

					 struct rdma_hw_stats *stats)

{

	struct bnxt_re_db_pacing_stats *pacing_s =  &rdev->stats.pacing;



	stats->value[BNXT_RE_PACING_RESCHED] = pacing_s->resched;

	stats->value[BNXT_RE_PACING_CMPL] = pacing_s->complete;

	stats->value[BNXT_RE_PACING_ALERT] = pacing_s->alerts;

	stats->value[BNXT_RE_DB_FIFO_REG] =

		readl(rdev->en_dev->bar0 + rdev->pacing.dbr_db_fifo_reg_off);

}



int bnxt_re_assign_pma_port_ext_counters(struct bnxt_re_dev *rdev, struct ib_mad *out_mad)

{

	struct ib_pma_portcounters_ext *pma_cnt_ext;
@@ -399,7 +364,6 @@ int bnxt_re_ib_get_hw_stats(struct ib_device *ibdev, 
			    u32 port, int index)

{

	struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev);

	struct bnxt_re_res_cntrs *res_s = &rdev->stats.res;

	struct bnxt_qplib_roce_stats *err_s = NULL;

	struct ctx_hw_stats *hw_stats = NULL;

	int rc  = 0;
@@ -408,26 +372,6 @@ int bnxt_re_ib_get_hw_stats(struct ib_device *ibdev, 
	if (!port || !stats)

		return -EINVAL;



	stats->value[BNXT_RE_ACTIVE_QP] = atomic_read(&res_s->qp_count);

	stats->value[BNXT_RE_ACTIVE_RC_QP] = atomic_read(&res_s->rc_qp_count);

	stats->value[BNXT_RE_ACTIVE_UD_QP] = atomic_read(&res_s->ud_qp_count);

	stats->value[BNXT_RE_ACTIVE_SRQ] = atomic_read(&res_s->srq_count);

	stats->value[BNXT_RE_ACTIVE_CQ] = atomic_read(&res_s->cq_count);

	stats->value[BNXT_RE_ACTIVE_MR] = atomic_read(&res_s->mr_count);

	stats->value[BNXT_RE_ACTIVE_MW] = atomic_read(&res_s->mw_count);

	stats->value[BNXT_RE_ACTIVE_PD] = atomic_read(&res_s->pd_count);

	stats->value[BNXT_RE_ACTIVE_AH] = atomic_read(&res_s->ah_count);

	stats->value[BNXT_RE_WATERMARK_QP] = res_s->qp_watermark;

	stats->value[BNXT_RE_WATERMARK_RC_QP] = res_s->rc_qp_watermark;

	stats->value[BNXT_RE_WATERMARK_UD_QP] = res_s->ud_qp_watermark;

	stats->value[BNXT_RE_WATERMARK_SRQ] = res_s->srq_watermark;

	stats->value[BNXT_RE_WATERMARK_CQ] = res_s->cq_watermark;

	stats->value[BNXT_RE_WATERMARK_MR] = res_s->mr_watermark;

	stats->value[BNXT_RE_WATERMARK_MW] = res_s->mw_watermark;

	stats->value[BNXT_RE_WATERMARK_PD] = res_s->pd_watermark;

	stats->value[BNXT_RE_WATERMARK_AH] = res_s->ah_watermark;

	stats->value[BNXT_RE_RESIZE_CQ_CNT] = atomic_read(&res_s->resize_count);



	if (hw_stats) {

		stats->value[BNXT_RE_RECOVERABLE_ERRORS] =

			le64_to_cpu(hw_stats->tx_bcast_pkts);
@@ -466,8 +410,6 @@ int bnxt_re_ib_get_hw_stats(struct ib_device *ibdev, 
				goto done;

			}

		}

		if (rdev->pacing.dbr_pacing && bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx))

			bnxt_re_copy_db_pacing_stats(rdev, stats);

	}



done:

drivers/infiniband/hw/bnxt_re/hw_counters.h

+0 −23
Original line number Diff line number Diff line
@@ -41,25 +41,6 @@ 
#define __BNXT_RE_HW_STATS_H__



enum bnxt_re_hw_stats {

	BNXT_RE_ACTIVE_PD,

	BNXT_RE_ACTIVE_AH,

	BNXT_RE_ACTIVE_QP,

	BNXT_RE_ACTIVE_RC_QP,

	BNXT_RE_ACTIVE_UD_QP,

	BNXT_RE_ACTIVE_SRQ,

	BNXT_RE_ACTIVE_CQ,

	BNXT_RE_ACTIVE_MR,

	BNXT_RE_ACTIVE_MW,

	BNXT_RE_WATERMARK_PD,

	BNXT_RE_WATERMARK_AH,

	BNXT_RE_WATERMARK_QP,

	BNXT_RE_WATERMARK_RC_QP,

	BNXT_RE_WATERMARK_UD_QP,

	BNXT_RE_WATERMARK_SRQ,

	BNXT_RE_WATERMARK_CQ,

	BNXT_RE_WATERMARK_MR,

	BNXT_RE_WATERMARK_MW,

	BNXT_RE_RESIZE_CQ_CNT,

	BNXT_RE_RX_PKTS,

	BNXT_RE_RX_BYTES,

	BNXT_RE_TX_PKTS,
@@ -129,10 +110,6 @@ enum bnxt_re_hw_stats { 
	BNXT_RE_TX_CNP,

	BNXT_RE_RX_CNP,

	BNXT_RE_RX_ECN,

	BNXT_RE_PACING_RESCHED,

	BNXT_RE_PACING_CMPL,

	BNXT_RE_PACING_ALERT,

	BNXT_RE_DB_FIFO_REG,

	BNXT_RE_REQ_CQE_ERROR,

	BNXT_RE_RESP_CQE_ERROR,

	BNXT_RE_RESP_REMOTE_ACCESS_ERRS,