Commit 7fdfd3d8 authored by Justin Swartz's avatar Justin Swartz Committed by Thomas Bogendoerfer
Browse files

mips: dts: ralink: mt7621: add serial1 and serial2 nodes 



Add serial1 and serial2 nodes to define the existence of
the MT7621's second and third UARTs.

Acked-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: default avatarJustin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 82394085

arch/mips/boot/dts/ralink/mt7621.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -129,6 +129,46 @@ serial0: serial@c00 { 
			pinctrl-0 = <&uart1_pins>;

		};



		serial1: serial@d00 {

			compatible = "ns16550a";

			reg = <0xd00 0x100>;



			reg-io-width = <4>;

			reg-shift = <2>;



			clocks = <&sysc MT7621_CLK_UART2>;



			interrupt-parent = <&gic>;

			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;



			no-loopback-test;



			pinctrl-names = "default";

			pinctrl-0 = <&uart2_pins>;



			status = "disabled";

		};



		serial2: serial@e00 {

			compatible = "ns16550a";

			reg = <0xe00 0x100>;



			reg-io-width = <4>;

			reg-shift = <2>;



			clocks = <&sysc MT7621_CLK_UART3>;



			interrupt-parent = <&gic>;

			interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;



			no-loopback-test;



			pinctrl-names = "default";

			pinctrl-0 = <&uart3_pins>;



			status = "disabled";

		};



		spi0: spi@b00 {

			status = "disabled";