Commit 8025f237 authored by Tejas Vipin's avatar Tejas Vipin Committed by Douglas Anderson
Browse files

drm/panel: xinpeng-xpp055c272: transition to mipi_dsi wrapped functions 



Changes the xinpeng-xpp055c272 panel to use multi style functions for
improved error handling.

Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: default avatarTejas Vipin <tejasvipin76@gmail.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20250107092510.174089-1-tejasvipin76@gmail.com
parent 0d6c9edf

drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c

+80 −98
Original line number Diff line number Diff line
@@ -59,46 +59,43 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel) 
	return container_of(panel, struct xpp055c272, panel);

}



static int xpp055c272_init_sequence(struct xpp055c272 *ctx)

static void xpp055c272_init_sequence(struct mipi_dsi_multi_context *dsi_ctx)

{

	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);

	struct device *dev = ctx->dev;



	/*

	 * Init sequence was supplied by the panel vendor without much

	 * documentation.

	 */

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETMIPI,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETMIPI,

				     0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00,

				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,

				     0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01,

				     0x00, 0x00, 0x37);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETRGBIF,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPOWER_EXT, 0x25);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETRGBIF,

				     0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00,

				     0x00, 0x00);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETSCR,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETSCR,

				     0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,

				     0x00);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEQ,

			       0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,

			       0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETVDC, 0x46);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPANEL, 0x0b);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETCYC, 0x80);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETEQ,

				     0x07, 0x07, 0x0b, 0x0b, 0x03, 0x0b, 0x00, 0x00,

				     0x00, 0x00, 0xff, 0x00, 0xC0, 0x10);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETPOWER,

				     0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd,

				     0x67, 0x77, 0x33, 0x33);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff,

				     0xff, 0x01, 0xff);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09);

	msleep(20);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETBGP, 0x09, 0x09);

	mipi_dsi_msleep(dsi_ctx, 20);



	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP1,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETVCOM, 0x87, 0x95);

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGIP1,

				     0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12,

				     0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18,

				     0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80,
@@ -107,7 +104,7 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx) 
				     0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88,

				     0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,

				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP2,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGIP2,

				     0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,

				     0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35,

				     0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f,
@@ -116,34 +113,26 @@ static int xpp055c272_init_sequence(struct xpp055c272 *ctx) 
				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05,

				     0xa0, 0x00, 0x00, 0x00, 0x00);

	mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGAMMA,

	mipi_dsi_dcs_write_seq_multi(dsi_ctx, XPP055C272_CMD_SETGAMMA,

				     0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36,

				     0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11,

				     0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38,

				     0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13,

				     0x11, 0x18);



	msleep(60);



	dev_dbg(dev, "Panel init sequence done\n");

	return 0;

	mipi_dsi_msleep(dsi_ctx, 60);

}



static int xpp055c272_unprepare(struct drm_panel *panel)

{

	struct xpp055c272 *ctx = panel_to_xpp055c272(panel);

	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);

	int ret;

	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };



	ret = mipi_dsi_dcs_set_display_off(dsi);

	if (ret < 0)

		dev_err(ctx->dev, "failed to set display off: %d\n", ret);



	mipi_dsi_dcs_enter_sleep_mode(dsi);

	if (ret < 0) {

		dev_err(ctx->dev, "failed to enter sleep mode: %d\n", ret);

		return ret;

	}

	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);

	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);

	if (dsi_ctx.accum_err)

		return dsi_ctx.accum_err;



	regulator_disable(ctx->iovcc);

	regulator_disable(ctx->vci);
@@ -155,17 +144,19 @@ static int xpp055c272_prepare(struct drm_panel *panel) 
{

	struct xpp055c272 *ctx = panel_to_xpp055c272(panel);

	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);

	int ret;

	struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };



	dev_dbg(ctx->dev, "Resetting the panel\n");

	ret = regulator_enable(ctx->vci);

	if (ret < 0) {

		dev_err(ctx->dev, "Failed to enable vci supply: %d\n", ret);

		return ret;

	dsi_ctx.accum_err = regulator_enable(ctx->vci);

	if (dsi_ctx.accum_err) {

		dev_err(ctx->dev, "Failed to enable vci supply: %d\n",

			dsi_ctx.accum_err);

		return dsi_ctx.accum_err;

	}

	ret = regulator_enable(ctx->iovcc);

	if (ret < 0) {

		dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);

	dsi_ctx.accum_err = regulator_enable(ctx->iovcc);

	if (dsi_ctx.accum_err) {

		dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n",

			dsi_ctx.accum_err);

		goto disable_vci;

	}
@@ -177,26 +168,17 @@ static int xpp055c272_prepare(struct drm_panel *panel) 
	/* T8: 20ms */

	msleep(20);



	ret = xpp055c272_init_sequence(ctx);

	if (ret < 0) {

		dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);

		goto disable_iovcc;

	}



	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);

	if (ret < 0) {

		dev_err(ctx->dev, "Failed to exit sleep mode: %d\n", ret);

		goto disable_iovcc;

	}

	xpp055c272_init_sequence(&dsi_ctx);

	if (!dsi_ctx.accum_err)

		dev_dbg(ctx->dev, "Panel init sequence done\n");



	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);

	/* T9: 120ms */

	msleep(120);

	mipi_dsi_msleep(&dsi_ctx, 120);

	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);



	ret = mipi_dsi_dcs_set_display_on(dsi);

	if (ret < 0) {

		dev_err(ctx->dev, "Failed to set display on: %d\n", ret);

	if (dsi_ctx.accum_err)

		goto disable_iovcc;

	}



	msleep(50);
@@ -206,7 +188,7 @@ static int xpp055c272_prepare(struct drm_panel *panel) 
	regulator_disable(ctx->iovcc);

disable_vci:

	regulator_disable(ctx->vci);

	return ret;

	return dsi_ctx.accum_err;

}



static const struct drm_display_mode default_mode = {