Commit 81f83a36 authored by Linus Walleij's avatar Linus Walleij Committed by Florian Fainelli
Browse files

ARM: dts: bcm63178: Add BCMBCA peripherals 



All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments.

Add the watchdog, GPIO, RNG, LED and DMA blocks for the
BCM63178 based on the vendor files 63178_map_part.h and
63178_intr.h from the "bcmopen-consumer" code drop.

This SoC has up to 256 possible GPIOs due to having 8
registers with 32 GPIOs in each available.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarWilliam Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-8-86f97ab4326f@linaro.org


Signed-off-by: default avatarFlorian Fainelli <florian.fainelli@broadcom.com>
parent ec8ed347

arch/arm/boot/dts/broadcom/bcm63178.dtsi

+112 −0
Original line number Diff line number Diff line
@@ -117,6 +117,97 @@ bus@ff800000 { 
		#size-cells = <1>;

		ranges = <0 0xff800000 0x800000>;



		watchdog@480 {

			compatible = "brcm,bcm6345-wdt";

			reg = <0x480 0x10>;

		};



		/* GPIOs 0 .. 31 */

		gpio0: gpio@500 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x500 0x04>, <0x520 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 32 .. 63 */

		gpio1: gpio@504 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x504 0x04>, <0x524 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 64 .. 95 */

		gpio2: gpio@508 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x508 0x04>, <0x528 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 96 .. 127 */

		gpio3: gpio@50c {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x50c 0x04>, <0x52c 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 128 .. 159 */

		gpio4: gpio@510 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x510 0x04>, <0x530 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 160 .. 191 */

		gpio5: gpio@514 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x514 0x04>, <0x534 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 192 .. 223 */

		gpio6: gpio@518 {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x518 0x04>, <0x538 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		/* GPIOs 224 .. 255 */

		gpio7: gpio@51c {

			compatible = "brcm,bcm6345-gpio";

			reg = <0x51c 0x04>, <0x53c 0x04>;

			reg-names = "dirout", "dat";

			gpio-controller;

			#gpio-cells = <2>;

			status = "disabled";

		};



		rng@b80 {

			compatible = "brcm,iproc-rng200";

			reg = <0xb80 0x28>;

			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

		};



		hsspi: spi@1000 {

			#address-cells = <1>;

			#size-cells = <0>;
@@ -143,6 +234,27 @@ nandcs: nand@0 { 
			};

		};



		leds: led-controller@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "brcm,bcm63138-leds";

			reg = <0x3000 0xdc>;

			status = "disabled";

		};



		pl081_dma: dma-controller@11000 {

			compatible = "arm,pl081", "arm,primecell";

			// The magic B105F00D info is missing

			arm,primecell-periphid = <0x00041081>;

			reg = <0x11000 0x1000>;

			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

			memcpy-burst-size = <256>;

			memcpy-bus-width = <32>;

			clocks = <&periph_clk>;

			clock-names = "apb_pclk";

			#dma-cells = <2>;

		};



		uart0: serial@12000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x12000 0x1000>;