Commit 83221064 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-xe-next-2024-04-23' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next



UAPI Changes:
- Remove unused flags (Francois Dugast)
- Extend uAPI to query HuC micro-controler firmware version (Francois Dugast)
- drm/xe/uapi: Define topology types as indexes rather than masks
  (Francois Dugast)
- drm/xe/uapi: Restore flags VM_BIND_FLAG_READONLY and VM_BIND_FLAG_IMMEDIATE
  (Francois Dugast)
- devcoredump updates. Some touching the output format.
  (José Roberto de Souza, Matthew Brost)
- drm/xe/hwmon: Add infra to support card power and energy attributes
- Improve LRC, HWSP and HWCTX error capture. (Maarten Lankhorst)
- drm/xe/uapi: Add IP version and stepping to GT list query (Matt roper)
- Invalidate userptr VMA on page pin fault (Matthew Brost)
- Improve xe_bo_move tracepoint (Priyanka Danamudi)
- Align fence output format in ftrace log

Cross-driver Changes:
- drm/i915/hwmon: Get rid of devm (Ashutosh Dixit)
  (Acked-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com&gt;)>
- drm/i915/display: convert inner wakeref get towards get_if_in_use
  (SOB Rodrigo Vivi)
- drm/i915: Convert intel_runtime_pm_get_noresume towards raw wakeref
  (Committer, SOB Jani Nikula)

Driver Changes:
- Fix for unneeded CCS metadata allocation (Akshata Jahagirdar)
- Fix for fix multicast support for Xe_LP platforms (Andrzej Hajda)
- A couple of build fixes (Arnd Bergmann)
- Fix register definition (Ashutosh Dixit)
- Add BMG mocs table (Balasubramani Vivekanandan)
- Replace sprintf() across driver (Bommu Krishnaiah)
- Add an xe2 workaround (Bommu Krishnaiah)
- Makefile fix (Dafna Hirschfeld)
- force_wake_get error value check (Daniele Ceraolo Spurio)
- Handle GSCCS ER interrupt (Daniele Ceraolo Spurio)
- GSC Workaround (Daniele Ceraolo Spurio)
- Build error fix (Dawei Li)
- drm/xe/gt: Add L3 bank mask to GT topology (Francois Dugast)
- Implement xe2- and GuC workarounds (Gustavo Sousa, Haridhar Kalvala,
  Himal rasad Ghimiray, John Harrison, Matt Roper, Radhakrishna Sripada,
  Vinay Belgaumkar, Badal Nilawar)
- xe2hpg compression (Himal Ghimiray Prasad)
- Error code cleanups and fixes (Himal Prasad Ghimiray)
- struct xe_device cleanup (Jani Nikula)
- Avoid validating bos when only requesting an exec dma-fence
  (José Roberto de Souza)
- Remove debug message from migrate_clear (José Roberto de Souza)
- Nuke EXEC_QUEUE_FLAG_PERSISTENT leftover internal flag (José Roberto de Souza)
- Mark dpt and related vma as uncached (Juha-Pekka Heikkila)
- Hwmon updates (Karthik Poosa)
- KConfig fix when ACPI_WMI selcted (Lu Yao)
- Update intel_uncore_read*() return types (Luca Coelho)
- Mocs updates (Lucas De Marchi, Matt Roper)
- Drop dynamic load-balancing workaround (Lucas De Marchi)
- Fix a PVC workaround (Lucas De Marchi)
- Group live kunit tests into a single module (Lucas De Marchi)
- Various code cleanups (Lucas De Marchi)
- Fix a ggtt init error patch and move ggtt invalidate out of ggtt lock
  (Maarten Lankhorst)
- Fix a bo leak (Marten Lankhorst)
- Add LRC parsing for more GPU instructions (Matt Roper)
- Add various definitions for hardware and IP (Matt Roper)
- Define all possible engines in media IP descriptors (Matt Roper)
- Various cleanups, asserts and code fixes (Matthew Auld)
- Various cleanups and code fixes (Matthew Brost)
- Increase VM_BIND number of per-ioctl Ops (Matthew Brost, Paulo Zanoni)
- Don't support execlists in xe_gt_tlb_invalidation layer (Matthew Brost)
- Handle timing out of already signaled jobs gracefully (Matthew Brost)
- Pipeline evict / restore of pinned BOs during suspend / resume (Matthew Brost)
- Do not grab forcewakes when issuing GGTT TLB invalidation via GuC
  (Matthew Brost)
- Drop ggtt invalidate from display code (Matthew Brost)
- drm/xe: Add XE_BO_GGTT_INVALIDATE flag (Matthew Brost)
- Add debug messages for MMU notifier and VMA invalidate (Matthew Brost)
- Use ordered wq for preempt fence waiting (Matthew Brost)
- Initial development for SR-IOV support including some refactoring
  (Michal Wajdeczko)
- Various GuC- and GT- related cleanups and fixes (Michal Wajdeczko)
- Move userptr over to start using hmm_range_fault (Oak Zeng)
- Add new PCI IDs to DG2 platform (Ravi Kumar Vodapalli)
- Pcode - and VRAM initialization check update (Riana Tauro)
- Large PM update including i915 display patches, and a fix for one of those.
  (Rodrigo Vivi)
- Introduce performance tuning changes for Xe2_HPG (Shekhar Chauhan)
- GSC / HDCP updates (Suraj Kandpal)
- Minor code cleanup (Tejas Upadhyay)
- Rework / fix rebind TLB flushing and move rebind into the drm_exec locking loop
  (Thomas Hellström)
- Backmerge (Thomas Hellström)
- GuC updates and fixes (Vinay Belgaumkar, Zhanjun Dong)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

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# Conflicts:
#	drivers/gpu/drm/xe/xe_device_types.h
#	drivers/gpu/drm/xe/xe_vm.c
#	drivers/gpu/drm/xe/xe_vm_types.h
From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Zievlb1wvqDg1ovi@fedora
parents 0208ca55 48c64d49
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+67 −27
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ Description: RW. Card reactive sustained (PL1) power limit in microwatts.
		power limit is disabled, writing 0 disables the
		limit. Writing values > 0 and <= TDP will enable the power limit.

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
Date:		September 2023
@@ -18,53 +18,93 @@ KernelVersion: 6.5
Contact:	intel-xe@lists.freedesktop.org
Description:	RO. Card default power limit (default TDP setting).

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
Date:		September 2023
KernelVersion:	6.5
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Card reactive critical (I1) power limit in microwatts.
Description:	RO. Card energy input of device in microjoules.

		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
Date:		October 2023
KernelVersion:	6.6
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Card sustained power limit interval (Tau in PL1/Tau) in
		milliseconds over which sustained power is averaged.

		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_max
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Package reactive sustained  (PL1) power limit in microwatts.

		The power controller will throttle the operating frequency
		if the power averaged over a window (typically seconds)
		exceeds this limit. A read value of 0 means that the PL1
		power limit is disabled, writing 0 disables the
		limit. Writing values > 0 and <= TDP will enable the power limit.

		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_rated_max
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RO. Package default power limit (default TDP setting).

		Card reactive critical (I1) power limit in microwatts is exposed
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_crit
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Package reactive critical (I1) power limit in microwatts.

		Package reactive critical (I1) power limit in microwatts is exposed
		for client products. The power controller will throttle the
		operating frequency if the power averaged over a window exceeds
		this limit.

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
Date:		September 2023
KernelVersion:	6.5
What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr2_crit
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Card reactive critical (I1) power limit in milliamperes.
Description:	RW. Package reactive critical (I1) power limit in milliamperes.

		Card reactive critical (I1) power limit in milliamperes is
		Package reactive critical (I1) power limit in milliamperes is
		exposed for server products. The power controller will throttle
		the operating frequency if the power averaged over a window
		exceeds this limit.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in0_input
Date:		September 2023
KernelVersion:	6.5
What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy2_input
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RO. Current Voltage in millivolt.
Description:	RO. Package energy input of device in microjoules.

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
Date:		September 2023
KernelVersion:	6.5
What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_max_interval
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RO. Energy input of device in microjoules.
Description:	RW. Package sustained power limit interval (Tau in PL1/Tau) in
		milliseconds over which sustained power is averaged.

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.

What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
Date:		October 2023
KernelVersion:	6.6
What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in1_input
Date:		February 2024
KernelVersion:	6.8
Contact:	intel-xe@lists.freedesktop.org
Description:	RW. Sustained power limit interval (Tau in PL1/Tau) in
		milliseconds over which sustained power is averaged.
Description:	RO. Package current voltage in millivolt.

		Only supported for particular Intel xe graphics platforms.
		Only supported for particular Intel Xe graphics platforms.
+23 −0
Original line number Diff line number Diff line
@@ -304,6 +304,29 @@ static ssize_t devcd_read_from_sgtable(char *buffer, loff_t offset,
				  offset);
}

/**
 * dev_coredump_put - remove device coredump
 * @dev: the struct device for the crashed device
 *
 * dev_coredump_put() removes coredump, if exists, for a given device from
 * the file system and free its associated data otherwise, does nothing.
 *
 * It is useful for modules that do not want to keep coredump
 * available after its unload.
 */
void dev_coredump_put(struct device *dev)
{
	struct device *existing;

	existing = class_find_device(&devcd_class, NULL, dev,
				     devcd_match_failing);
	if (existing) {
		devcd_free(existing, NULL);
		put_device(existing);
	}
}
EXPORT_SYMBOL_GPL(dev_coredump_put);

/**
 * dev_coredumpm - create device coredump with read/free methods
 * @dev: the struct device for the crashed device
+1 −7
Original line number Diff line number Diff line
@@ -640,13 +640,7 @@ release_async_put_domains(struct i915_power_domains *power_domains,
	enum intel_display_power_domain domain;
	intel_wakeref_t wakeref;

	/*
	 * The caller must hold already raw wakeref, upgrade that to a proper
	 * wakeref to make the state checker happy about the HW access during
	 * power well disabling.
	 */
	assert_rpm_raw_wakeref_held(rpm);
	wakeref = intel_runtime_pm_get(rpm);
	wakeref = intel_runtime_pm_get_noresume(rpm);

	for_each_power_domain(domain, mask) {
		/* Clear before put, so put's sanity check is happy. */
+6 −0
Original line number Diff line number Diff line
@@ -13,6 +13,12 @@
#include "intel_hdcp_gsc.h"
#include "intel_hdcp_gsc_message.h"

struct intel_hdcp_gsc_message {
	struct i915_vma *vma;
	void *hdcp_cmd_in;
	void *hdcp_cmd_out;
};

bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)
{
	return DISPLAY_VER(i915) >= 14;
+1 −6
Original line number Diff line number Diff line
@@ -10,12 +10,7 @@
#include <linux/types.h>

struct drm_i915_private;

struct intel_hdcp_gsc_message {
	struct i915_vma *vma;
	void *hdcp_cmd_in;
	void *hdcp_cmd_out;
};
struct intel_hdcp_gsc_message;

bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915);
ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
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