Commit 862cf85f authored by Nuno Sa's avatar Nuno Sa Committed by Jonathan Cameron
Browse files

iio: commom: st_sensors: ensure proper DMA alignment 

Aligning the buffer to the L1 cache is not sufficient in some platforms
as they might have larger cacheline sizes for caches after L1 and thus,
we can't guarantee DMA safety.

That was the whole reason to introduce IIO_DMA_MINALIGN in [1]. Do the same
for st_sensors common buffer.

While at it, moved the odr_lock before buffer_data as we definitely
don't want any other data to share a cacheline with the buffer.

[1]: https://lore.kernel.org/linux-iio/20220508175712.647246-2-jic23@kernel.org/



Fixes: e031d5f5 ("iio:st_sensors: remove buffer allocation at each buffer enable")
Signed-off-by: default avatarNuno Sa <nuno.sa@analog.com>
Cc: <Stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20240131-dev_dma_safety_stm-v2-1-580c07fae51b@analog.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 621c6257

include/linux/iio/common/st_sensors.h

+2 −2
Original line number Diff line number Diff line
@@ -258,9 +258,9 @@ struct st_sensor_data { 
	bool hw_irq_trigger;

	s64 hw_timestamp;



	char buffer_data[ST_SENSORS_MAX_BUFFER_SIZE] ____cacheline_aligned;



	struct mutex odr_lock;



	char buffer_data[ST_SENSORS_MAX_BUFFER_SIZE] __aligned(IIO_DMA_MINALIGN);

};



#ifdef CONFIG_IIO_BUFFER