Commit 86d8f905 authored by Simona Vetter's avatar Simona Vetter
Browse files

Merge tag 'amd-drm-fixes-6.7-2023-11-17' of... 

Merge tag 'amd-drm-fixes-6.7-2023-11-17' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.7-2023-11-17:

amdgpu:
- DMCUB fixes
- SR-IOV fix
- GMC9 fix
- Documentation fix
- DSC MST fix
- CS chunk parsing fix
- SMU13.0.6 fixes
- 8K tiled display fix
- Fix potential NULL pointer dereferences
- Cursor lag fix
- Backlight fix
- DCN s0ix fix
- XGMI fix
- DCN encoder disable logic fix
- AGP aperture fixes

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231117063441.4883-1-alexander.deucher@amd.com
parents 63957f6b e8c2d3e2

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -248,6 +248,7 @@ extern int amdgpu_umsch_mm; 
extern int amdgpu_seamless;



extern int amdgpu_user_partt_mode;

extern int amdgpu_agp;



#define AMDGPU_VM_MAX_NUM_CTX			4096

#define AMDGPU_SG_THRESHOLD			(256*1024*1024)

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p, 
	}



	for (i = 0; i < p->nchunks; i++) {

		struct drm_amdgpu_cs_chunk __user **chunk_ptr = NULL;

		struct drm_amdgpu_cs_chunk __user *chunk_ptr = NULL;

		struct drm_amdgpu_cs_chunk user_chunk;

		uint32_t __user *cdata;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+10 −0
Original line number Diff line number Diff line
@@ -207,6 +207,7 @@ int amdgpu_user_partt_mode = AMDGPU_AUTO_COMPUTE_PARTITION_MODE; 
int amdgpu_umsch_mm;

int amdgpu_seamless = -1; /* auto */

uint amdgpu_debug_mask;

int amdgpu_agp = -1; /* auto */



static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
@@ -961,6 +962,15 @@ module_param_named(seamless, amdgpu_seamless, int, 0444); 
MODULE_PARM_DESC(debug_mask, "debug options for amdgpu, disabled by default");

module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444);



/**

 * DOC: agp (int)

 * Enable the AGP aperture.  This provides an aperture in the GPU's internal

 * address space for direct access to system memory.  Note that these accesses

 * are non-snooped, so they are only used for access to uncached memory.

 */

MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)");

module_param_named(agp, amdgpu_agp, int, 0444);



/* These devices are not supported by amdgpu.

 * They are supported by the mach64, r128, radeon drivers

 */

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+5 −0
Original line number Diff line number Diff line
@@ -1473,6 +1473,11 @@ int psp_xgmi_get_topology_info(struct psp_context *psp, 
				topology->nodes[i].num_links = (requires_reflection && topology->nodes[i].num_links) ?

								topology->nodes[i].num_links : node_num_links;

			}

			/* popluate the connected port num info if supported and available */

			if (ta_port_num_support && topology->nodes[i].num_links) {

				memcpy(topology->nodes[i].port_num, link_extend_info_output->nodes[i].port_num,

				       sizeof(struct xgmi_connected_port_num) * TA_XGMI__MAX_PORT_NUM);

			}



			/* reflect the topology information for bi-directionality */

			if (requires_reflection && topology->nodes[i].num_hops)

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

+1 −0
Original line number Diff line number Diff line
@@ -150,6 +150,7 @@ struct psp_xgmi_node_info { 
	uint8_t					is_sharing_enabled;

	enum ta_xgmi_assigned_sdma_engine	sdma_engine;

	uint8_t					num_links;

	struct xgmi_connected_port_num		port_num[TA_XGMI__MAX_PORT_NUM];

};



struct psp_xgmi_topology_info {